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| ezr32wg wireless mcus ezr32wg230 data sheet ezr32wg230 wireless mcu family with arm cortex-m4 cpu and sub-ghz radio the ezr32wg wireless mcus are the latest in silicon labs family of wireless mcus delivering a high performance, low energy wireless solution integrated into a small form factor package. by combining a high performance sub-ghz rf transceiver with an ener- gy efficient 32-bit mcu, the ezr32wg family provides designers the ultimate in flexibili- ty with a family of pin-compatible devices that scale with 64/128/256 kb of flash and sup- port silicon labs ezradio or ezradiopro transceivers. the ultra-low power operating modes and fast wake-up times of the silicon labs energy friendly 32-bit mcus, com- bined with the low transmit and receive power consumption of the sub-ghz radio, result in a solution optimized for battery powered applications. 32-bit arm cortex wireless mcus applications include the following: key features ? silicon labs first 32-bit wireless mcus ? based on arm cortex m3 (lg) and m4 (wg) cpu cores with 256 kb of flash and 32 kb ram ? best-in-class rf performance with ezradio and ezradiopro transceivers ? ultra-low power wireless mcu ? low transmit and receive currents ? ultra-low power standby and sleep modes ? fast wake-up time ? low energy sensor interface (lesense) ? rich set of peripherals including 12-bit adc and dac, multiple communication interfaces (uart, spi, i2c), multiple gpio and timers ? aes accelerator with 128/256-bit keys ? energy, gas, water and smart metering ? health and fitness applications ? consumer electronics ? alarm and security systems ? building and home automation silabs.com | smart. connected. energy-friendly. rev. 1.1
1. feature list the wg highlighted features are listed below. mcu features ? arm cortex-m4 cpu platform ? up to 48 mhz ? 64/128/256 kb flash w/32 kb ram ? hardware aes with 128/256-bit keys ? flexible energy management system ? 20 na @ 3 v shutoff mode ? 0.65 a @ 3 v stop mode ? 225 a/mhz @ 3 v run mode ? timers/counters ? 4 timer/counter ? 43 compare/capture/pwm channels ? low energy timer ? real-time counter ? 16/8-bit pulse counter ? watchdog timer ? communication interfaces ? 2 usart (uart/spi) ? 2 uart ? 2 low energy uart ? 2 i2c interface with smbus support ? ultra low power precision analog peripherals ? 12-bit 1 msamples/s adc ? on-chip temperature sensor ? 12-bit 500 ksamples/s dac ? 2 analog comparator ? 2x operational amplifier ? low energy sensor interface (lesense) ? up to 41 general purpose i/o pins rf features ? frequency range ? 142-1050 mhz ? modulation ? (g)fsk, 4(g)fsk, (g)msk, ook ? receive sensitivity up to -133 dbm ? up to +20 dbm max output power ? low active power consumption ? 10/13 ma rx ? 18 ma tx at +10 dbm ? 6 ma @ 1.2 kbps (preamble sense) ? data rate = 100 bps to 1 mbps ? excellent selectivity performance ? 69 db adjacent channel ? 79 db blocking at 1 mhz ? antenna diversity and t/r switch control ? highly configurable packet handler ? tx and rx 64 byte fifos ? automatic frequency control (afc) ? automatic gain control (agc) ? ieee 802.15.4g compliant system features ? power-on reset and brown-out detector ? debug interface ? temperature range -40 to 85 c ? single power supply 1.98 to 3.8 v ? qfn64 package ezr32wg230 data sheet feature list silabs.com | smart. connected. energy-friendly. rev. 1.1 | 1 2. ordering information the table below shows the available ezr32wg230 devices. table 2.1. ordering information ordering radio flash (kb) ram (kb) power am- plifier (dbm) max sensi- tivity (dbm) supply volt- age (v) package ezr32wg230fxxxr55g ezradio 64-256 32 +13 -116 1.98 - 3.8 qfn64 ezr32wg230fxxxr60g ezradiopro 64-256 32 +13 -129 1.98 - 3.8 qfn64 ezr32wg230fxxxr61g ezradiopro 64-256 32 +16 -129 1.98 - 3.8 qfn64 ezr32wg230fxxxr63g ezradiopro 64-256 32 +20 -129 1.98 - 3.8 qfn64 ezr32wg230fxxxr67g ezradiopro 64-256 32 +13 -133 1.98 - 3.8 qfn64 ezr32wg230fxxxr68g ezradiopro 64-256 32 +20 -133 1.98 - 3.8 qfn64 ezr32wg230fxxxr69g ezradiopro 64-256 32 +13 & 20 -133 1.98 - 3.8 qfn64 table 2.2. flash sizes example part number flash size ezr32wg230f64r55g 64 kb EZR32WG230F128R55G 128 kb ezr32wg230f256r55g 256 kb note: add an "(r)" at the end of the device part number to denote tape and reel option. visit www.silabs.com for information on global distributors and representatives. ezr32wg230 data sheet ordering information silabs.com | smart. connected. energy-friendly. rev. 1.1 | 2 3. system overview 3.1 introduction the ezr32 wg230 wireless mcus are the latest in silicon labs family of wireless mcus delivering a high performance, low energy wireless solution integrated into a small form factor package. by combining a high performance sub-ghz rf transceiver with an energy efficient 32-bit arm cortex-m4 , the ezr32 wg family provides designers with the ultimate in flexibility with a family of pin-compatible parts that scale from 64 to 256 kb of flash and support silicon labs ezradio or ezradiopro transceivers. the ultra-low power operat- ing modes and fast wake-up times combined with the low transmit and receive power consumption of the sub-ghz radio result in a solution optimized for low power and battery powered applications. for a complete feature set and in-depth information on the modules, the reader is referred to the ezr32wg reference manual . the ezr32wg230 block diagram is shown below. figure 3.1. block diagram 3.1.1 arm cortex-m4 core the arm cortex-m4 includes a 32-bit risc processor which can achieve as much as 1.25 dhrystone mips/mhz. a memory protection unit with support for up to 8 memory segments is included, as well as a wake-up interrupt controller handling interrupts triggered while the cpu is asleep. the ezr32 implementation of the cortex-m4 is described in detail in ezr32 cortex-m4 reference manual . 3.1.2 debugging these devices include hardware debug support through a 2-pin serial-wire debug interface and an embedded trace module (etm) for data/instruction tracing. in addition there is also a 1-wire serial wire viewer pin which can be used to output profiling information, data trace and software-generated messages. 3.1.3 memory system controller (msc) the memory system controller (msc) is the program memory unit of the ezr32 wg microcontroller. the flash memory is readable and writable from both the cortex-m4 and dma. the flash memory is divided into two blocks: the main block and the information block. program code is normally written to the main block. additionally, the information block is available for special user data and flash lock bits. there is also a read-only page in the information block containing system and device calibration data. read and write operations are supported in the energy modes em0 and em1. ezr32wg230 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.1 | 3 3.1.4 direct memory access controller (dma) the direct memory access (dma) controller performs memory operations independently of the cpu. this has the benefit of reducing the energy consumption and the workload of the cpu, and enables the system to stay in low energy modes when moving, for instance, data from the usart to ram or from the external bus interface to a pwm-generating timer. the dma controller uses the pl230 dma controller licensed from arm. 3.1.5 reset management unit (rmu) the rmu is responsible for handling the reset functionality of the ezr32wg. 3.1.6 energy management unit (emu) the energy management unit (emu) manages all the low energy modes (em) in ezr32 wg microcontrollers. each energy mode man- ages if the cpu and the various peripherals are available. the emu can also be used to turn off the power to unused sram blocks. 3.1.7 clock management unit (cmu) the clock management unit (cmu) is responsible for controlling the oscillators and clocks on-board the ezr32 wg. the cmu provides the capability to turn on and off the clock on an individual basis to all peripheral modules in addition to enable/disable and configure the available oscillators. the high degree of flexibility enables software to minimize energy consumption in any specific application by not wasting power on peripherals and oscillators that are inactive. 3.1.8 watchdog (wdog) the purpose of the watchdog timer is to generate a reset in case of a system failure, to increase application reliability. the failure may, for example, be caused by an external event, such as an esd pulse, or by a software failure. 3.1.9 peripheral reflex system (prs) the peripheral reflex system (prs) system is a network which lets the different peripheral module communicate directly with each other without involving the cpu. peripheral modules which send out reflex signals are called producers. the prs routes these reflex signals to consumer peripherals which apply actions depending on the data received. the format for the reflex signals is not given, but edge triggers and other functionality can be applied by the prs. 3.1.10 inter-integrated circuit interface (i 2 c) the i 2 c module provides an interface between the mcu and a serial i 2 c-bus. it is capable of acting as both a master and a slave, and supports multi-master buses. both standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates all the way from 10 kbit/s up to 1 mbit/s. slave arbitration and timeouts are also provided to allow implementation of an smbus compliant system. the interface provided to software by the i 2 c module allows both fine-grained control of the transmission process and close to automatic transfers. automatic recognition of slave addresses is provided in all energy modes. 3.1.11 universal synchronous/asynchronous receiver/transmitter (usart) the universal synchronous asynchronous serial receiver and transmitter (usart) is a very flexible serial i/o module. it supports full duplex asynchronous uart communication as well as rs-485, spi, microwire and 3-wire. it can also interface with iso7816 smart- cards, and i2s devices. 3.1.12 pre-programmed uart bootloader the bootloader presented in application note an0003 is pre-programmed in the device at factory. autobaud and destructive write are supported. the autobaud feature, interface, and commands are described further in the application note. 3.1.13 universal asynchronous receiver/transmitter (uart) the universal asynchronous serial receiver and transmitter (uart) is a very flexible serial i/o module. it supports full- and half-du- plex asynchronous uart communication. ezr32wg230 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.1 | 4 3.1.14 low energy universal asynchronous receiver/transmitter (leuart) the unique leuart ? , the low energy uart, is a uart that allows two-way uart communication on a strict power budget. only a 32.768 khz clock is needed to allow uart communication up to 9600 baud/s. the leuart includes all necessary hardware support to make asynchronous serial communication possible with minimum of software intervention and energy consumption. 3.1.15 timer/counter (timer) the 16-bit general purpose timer has 3 compare/capture channels for input capture and compare/pulse-width modulation (pwm) out- put. timer0 also includes a dead-time insertion module suitable for motor control applications. 3.1.16 real time counter (rtc) the real time counter (rtc) contains a 24-bit counter and is clocked either by a 32.768 khz crystal oscillator, or a 32.768 khz rc oscillator. in addition to energy modes em0 and em1, the rtc is also available in em2. this makes it ideal for keeping track of time since the rtc is enabled in em2 where most of the device is powered down. 3.1.17 backup real time counter (burtc) the backup real time counter (burtc) contains a 32-bit counter and is clocked either by a 32.768 khz crystal oscillator, a 32.768 khz rc oscillator or a 1 khz ulfrco. the burtc is available in all energy modes and it can also run in backup mode, making it operational even if the main power should drain out. 3.1.18 low energy timer (letimer) the unique letimer ? , the low energy timer, is a 16-bit timer that is available in energy mode em2 in addition to em1 and em0. because of this, it can be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed while the power consumption of the system is kept at an absolute minimum. the letimer can be used to output a variety of waveforms with minimal software intervention. it is also connected to the real time counter (rtc), and can be configured to start counting on compare matches from the rtc. 3.1.19 pulse counter (pcnt) the pulse counter (pcnt) can be used for counting pulses on a single input or to decode quadrature encoded inputs. it runs off either the internal lfaclk or the pcntn_s0in pin as external clock source. the module may operate in energy mode em0 - em3. 3.1.20 analog comparator (acmp) the analog comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is high- er. inputs can either be one of the selectable internal references or from external pins. response time and thereby also the current consumption can be configured by altering the current supply to the comparator. 3.1.21 voltage comparator (vcmp) the voltage supply comparator is used to monitor the supply voltage from software. an interrupt can be generated when the supply falls below or rises above a programmable threshold. response time and thereby also the current consumption can be configured by altering the current supply to the comparator. 3.1.22 analog to digital converter (adc) the adc is a successive approximation register (sar) architecture, with a resolution of up to 12 bits at up to one million samples per second. the integrated input mux can select inputs from 8 external pins and 6 internal signals. 3.1.23 digital to analog converter (dac) the digital to analog converter (dac) can convert a digital value to an analog output voltage. the dac is fully differential rail-to-rail, with 12-bit resolution. it has two single ended output buffers which can be combined into one differential output. the dac may be used for a number of different applications such as sensor interfaces or sound output. ezr32wg230 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.1 | 5 3.1.24 operational amplifier (opamp) the ezr32 wg230 features 2 operational amplifiers. the operational amplifier is a versatile general purpose amplifier with rail-to-rail differential input and rail-to-rail single ended output. the input can be set to pin, dac or opamp, whereas the output can be pin, opamp or adc. the current is programmable and the opamp has various internal configurations such as unity gain, programmable gain using internal resistors, etc. 3.1.25 low energy sensor interface (lesense) the low energy sensor interface ( lesense ? ), is a highly configurable sensor interface with support for up to 16 individually configu- rable sensors. by controlling the analog comparators and dac, lesense is capable of supporting a wide range of sensors and meas- urement schemes, and can for instance measure lc sensors, resistive sensors and capacitive sensors. lesense also includes a pro- grammable fsm which enables simple processing of measurement results without cpu intervention. lesense is available in energy mode em2, in addition to em0 and em1, making it ideal for sensor monitoring in applications with a strict energy budget. 3.1.26 backup power domain the backup power domain is a separate power domain containing a backup real time counter, burtc, and a set of retention regis- ters, available in all energy modes. this power domain can be configured to automatically change power source to a backup battery when the main power drains out. the backup power domain enables the ezr32 wg230 to keep track of time and retain data, even if the main power source should drain out. 3.1.27 advanced encryption standard accelerator (aes) the aes accelerator performs aes encryption and decryption with 128-bit or 256-bit keys. encrypting or decrypting one 128-bit data block takes 52 hfcoreclk cycles with 128-bit keys and 75 hfcoreclk cycles with 256-bit keys. the aes module is an ahb slave which enables efficient access to the data and key registers. all write accesses to the aes module must be 32-bit operations (i.e., 8- or 16-bit operations are not supported). 3.1.28 general purpose input/output (gpio) in the ezr32 wg230 , there are 41 general purpose input/output (gpio) pins, which are divided into ports with up to 16 pins each. these pins can individually be configured as either an output or input. more advanced configurations like open-drain, filtering and drive strength can also be configured individually for the pins. the gpio pins can also be overridden by peripheral pin connections, like tim- er pwm outputs or usart communication, which can be routed to several locations on the device. the gpio supports up to 16 asyn- chronous external pin interrupts, which enables interrupts from any pin on the device. also, the input value of a pin can be routed through the peripheral reflex system to other peripherals. ezr32wg230 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.1 | 6 3.1.29 ezradio ? and ezradiopro ? transceivers the ezr32 wg family of devices is built using high-performance, low-current ezradio and ezradiopro rf transceivers covering the sub-ghz frequency bands from 142 to 1050 mhz. these devices offer outstanding sensitivity of upto C133 dbm (using ezradiopro) while achieving extremely low active and standby current consumption. the ezr32 wg devices using the ezradiopro transceiver offer frequency coverage in all major bands and include optimal phase noise, blocking, and selectivity performance for narrow band and li- censed band applications, such as fcc part 90 and 169 mhz wireless mbus. the 69 db adjacent channel selectivity with 12.5 khz channel spacing ensures robust receive operation in harsh rf conditions, which is particularly important for narrow band operation. the active mode tx current consumption of 18 ma at +10 dbm and rx current of 10 ma coupled with extremely low standby current and fast wake times is optimized for extended battery life in the most demanding applications. the ezr32 wg devices can achieve up to +27 dbm output power with built-in ramping control of a low-cost external fet. the devices can meet worldwide regulatory standards: fcc, etsi, and arib. all devices are designed to be compliant with 802.15.4g and wmbus smart metering standards. the devices are highly flexible and can be programmed and configured via simplicity studio, available at www.silabs.com . communications between the radio and mcu are done over usart, prs and irq, which requires the pins to be configured in the following way: table 3.1. radio mcu communication configuration ezr32wg pin radio assignment ezr32wg function assignment pe8 sdn gpio output pe9 n sel bit-banged spi.cs (gpio output) pe10 sdi us0_tx #0 pe11 sdo us0_rx #0 pe12 sclk us0_clk #0 pe13 n irq gpio_em4wu5 (gpio input with irq ena- bled) pe14 gpio1 prs input pa15 gpio0 prs input ezr32wg230 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.1 | 7 3.1.29.1 ezradio? and ezradiopro? transceivers gpio configuration the ezradio and ezradiopro transceivers have 4 general purpose digital i/o pins. these gpios may be configured to perform various radio-specific functions, including clock output, fifo status, por, wake-up timer, trsw, antdiversity control, etc. two of the radio gpio pins are directly connected to pins on the package (gpio2 and gpio3). however, the remaining two radio gpio pins (gpio0 and gpio1) connect internally on the ezr32 wg to the pins shown in 3.1.29 ezradio ? and ezradiopro ? transceivers . these radio gpios may be routed to external package pins using the ezr32 wg s peripheral reflex system (prs). note that the maxi- mum frequency of the gpio pins routed through prs pins may be limited to ~10 mhz. below is some example code illustrating how to configure the ezr32 wg prs system to output the radio gpio0/gpio1 functions to ezr32wg pins pa0 / pa1, respectively. note that the radio gpio0/gpio1 functions could also be connected to ezr32 wg pins pf3/ pf4. /* prs routing radio gpio0 and gpio1 to external pin pa0&pa1 */ / * note that this code example uses the emlib library functions for cmu, gpio, and prs */ /* enable prs clock */ cmu_clockenable(cmuclock_prs, true); /* setup input pins */ gpio_pinmodeset(gpioporta, 15, gpiomodeinput, 0); gpio_pinmodeset(gpioporte, 14, gpiomodeinput, 0); /* setup output pins */ gpio_pinmodeset(gpioporta, 0, gpiomodepushpull, 0); gpio_pinmodeset(gpioporta, 1, gpiomodepushpull, 0); /* configure int/prs channels */ gpio_intconfig(gpioporta, 15, false, false, false); gpio_intconfig(gpioporte, 14, false, false, false); /* setup prs */ prs_sourceasyncsignalset(0, prs_ch_ctrl_sourcesel_gpioh, prs_ch_ctrl_sigsel_gpiopin15); prs_sourceasyncsignalset(1, prs_ch_ctrl_sourcesel_gpioh, prs_ch_ctrl_sigsel_gpiopin14); prs->route = (prs_route_ch0pen | prs_route_ch1pen); /* make sure prs sensing is enabled (should be by default) */ gpio_inputsenseset(gpio_insense_prs, gpio_insense_prs); ezr32wg230 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.1 | 8 3.2 configuration summary the features of the ezr32 wg230 are a subset of the feature set described in the ezr32wg reference manual . the table below de- scribes device specific implementation of the features. table 3.2. configuration summary module configuration pin connections cortex-m4 full configuration na dbg full configuration dbg_swclk, dbg_swdio, dbg_swo msc full configuration na dma full configuration na rmu full configuration na emu full configuration na cmu full configuration cmu_out0, cmu_out1 wdog full configuration na prs full configuration na i2c0 full configuration i2c0_sda, i2c0_scl i2c1 full configuration i2c1_sda, i2c1_scl usartrf0 full configuration with irda us0_tx, us0_rx, us0_clk, us0_cs usart1 full configuration with i2s us1_tx, us1_rx, us1_clk, us1_cs usart2 full configuration with i2s us2_tx, us2_rx, us2_clk, us2_cs uart0 full configuration u0_tx, u0_rx uart1 full configuration u1_tx, u1_rx leuart0 full configuration leu0_tx, leu0_rx leuart1 full configuration leu1_tx, leu1_rx timer0 full configuration with dti tim0_cc[2:0], tim0_cdti[2:0] timer1 full configuration tim1_cc[2:0] timer2 full configuration tim2_cc[2:0] timer3 full configuration tim3_cc[2:0] rtc full configuration na burtc full configuration na letimer0 full configuration let0_o[1:0] pcnt0 full configuration, 16-bit count register pcnt0_s[1:0] pcnt1 full configuration, 8-bit count register pcnt1_s[1:0] pcnt2 full configuration, 8-bit count register pcnt2_s[1:0] acmp0 full configuration acmp0_ch[7:0], acmp0_o acmp1 full configuration acmp1_ch[7:0], acmp1_o vcmp full configuration na adc0 full configuration adc0_ch[7:0] dac0 full configuration dac0_out[1:0] ezr32wg230 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.1 | 9 module configuration pin connections opamp full configuration outputs: opamp_outx, opamp_out- xalt, inputs: opamp_px, opamp_nx aes full configuration na gpio 41 pins available pins are shown in 5.4 gpio pin- out overview 3.3 memory map the ezr32wg230 memory map is shown below with ram and flash sizes for the largest memory configuration. figure 3.2. ezr32wg230 memory map with largest ram and flash sizes ezr32wg230 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.1 | 10 4. electrical specifications 4.1 test conditions 4.1.1 typical values the typical data are based on t amb = 25c and v dd = 3.0 v, as defined in table 4.3 general operating conditions on page 12 , by simulation and/or technology characterisation unless otherwise specified. 4.1.2 minimum and maximum values the minimum and maximum values represent the worst conditions of ambient temperature, supply voltage and frequencies, as defined in table 4.3 general operating conditions on page 12 , by simulation and/or technology characterisation unless otherwise specified. 4.2 absolute maximum ratings the absolute maximum ratings are stress ratings, and functional operation under such conditions are not guaranteed. stress beyond the limits specified in the table below may affect the device reliability or cause permanent damage to the device. functional operating conditions are given in table 4.3 general operating conditions on page 12 . table 4.1. absolute maximum ratings parameter symbol test condition min typ max unit storage temperature range t stg -55 150 1 c maximum soldering tem- perature t s latest ipc/ jedec j- std-020 stand- ard 260 c external main supply voltage v ddmax 0 3.8 v voltage on any i/o pin v iopin -0.3 v dd +0.3 v note: 1. based on programmed devices tested for 10000 hours at 150 oc. storage temperature affects retention of preprogrammed cali- bration values stored in flash. please refer to the flash section in the electrical characteristics for information on flash data reten- tion for different temperatures. ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 11 4.3 thermal characteristics table 4.2. thermal conditions parameter symbol test condi- tion min typ max unit ambient temperature range t amb -40 85 c junction temperature value t j 105 1 c thermal impedance junction to ambient ti ja +13/+16 dbm on 2-layer board 61.8 c/w +20 dbm on 4- layer board 20.7 2 c/w storage temperature range t stg -55 150 c note: 1. values are based on simulations run on 2 layer and 4 layer pcbs at 0m/s airflow. 2. based on programmed devices tested for 10000 hours at 150 oc. storage temperature affects retention of preprogrammed cali- bration values stored in flash. please refer to the flash section in the electrical characteristics for information on flash data reten- tion for different temperatures. 4.4 general operating conditions table 4.3. general operating conditions parameter symbol min typ max unit ambient temperature range t amb -40 85 c operating supply voltage v ddop 1.98 3.8 v internal apb clock frequency f apb 48 mhz internal ahb clock frequency f ahb 48 mhz table 4.4. environmental parameter symbol test condi- tion min typ max unit esd (human body model hbm) v esdhbm t amb =25 c 2000 v esd (charged device model, cdm) v esdcdm t amb =25 c 500 v latch-up sensitivity passed: 100 ma/1.5 v supply (max) according to jedec jesd 78 method class ii, 85 c. ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 12 4.5 current consumption table 4.5. current consumption parameter symbol condition min typ max unit em0 current. no prescal- ing. running prime number calculation code from flash. (production test con- dition = 14 mhz) i em0 48 mhz hfxo, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 225 236 a/mhz 48 mhz hfxo, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 225 a/mhz 28 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 226 238 a/mhz 28 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 227 a/mhz 21 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 228 240 a/mhz 21 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 229 a/mhz 14 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 230 243 a/mhz 14 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 231 a/mhz 11 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 232 245 a/mhz 11 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 233 a/mhz 6.6 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 238 250 a/mhz 6.6 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 238 a/mhz 1.2 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 271 286 a/mhz 1.2 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 275 a/mhz ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 13 parameter symbol condition min typ max unit em1 current (production test condition = 14 mhz) i em1 48 mhz hfxo, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 63 75 a/mhz 48 mhz hfxo, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 65 76 a/mhz 28 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 64 75 a/mhz 28 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 65 77 a/mhz 21 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 65 76 a/mhz 21 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 66 78 a/mhz 14 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 67 79 a/mhz 14 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 68 82 a/mhz 11 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 68 81 a/mhz 11 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 70 83 a/mhz 6.6 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 74 87 a/mhz 6.6 mhz hfrco, all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 76 89 a/mhz 1.2 mhz hfrco. all peripheral clocks disabled, v dd = 3.0 v, t amb =25c 106 120 a/mhz 1.2 mhz hfrco. all peripheral clocks disabled, v dd = 3.0 v, t amb =85c 112 129 a/mhz em2 current i em2 em2 current with rtc prescaled to 1 hz, 32.768 khz lfrco, v dd = 3.0 v, t amb =25c 0.95 1 1.7 1 a em2 current with rtc prescaled to 1 hz, 32.768 khz lfrco, v dd = 3.0 v, t amb =85c 3.0 1 4.0 1 a em3 current i em3 v dd = 3.0 v, t amb =25c 0.65 1.3 a v dd = 3.0 v, t amb =85c 2.7 4.0 a ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 14 parameter symbol condition min typ max unit em4 current i em4 v dd = 3.0 v, t amb =25c 0.020 0.055 a v dd = 3.0 v, t amb =85c 0.44 0.90 a note: 1. using backup rtc. 4.6 transitions between energy modes the transition times are measured from the trigger to the first clock edge in the cpu. table 4.6. energy modes transitions parameter symbol min typ max unit transition time from em1 to em0 t em10 0 hfcoreclk cycles transition time from em2 to em0 t em20 2 s transition time from em3 to em0 t em30 2 s transition time from em4 to em0 t em40 163 s 4.7 power management the ezr32 wg requires the avdd_x, vdd_dreg and iovdd_x pins to be connected together (with optional filter) at the pcb level. for practical schematic recommendations, please see the application note, an0002: efm32 hardware design considerations . table 4.7. power management parameter symbol test condition min typ max unit bod threshold on falling external supply voltage v bodextthr- 1.74 1.96 v bod threshold on falling internally regulated supply voltage v bodintthr- 1.57 1.7 v bod threshold on rising external supply voltage v bodextthr+ 1.85 1.98 v power-on reset (por) threshold on rising external supply voltage v porthr+ 1.98 v delay from reset is released until program execution starts t reset applies to power-on re- set, brown-out reset and pin reset. 163 s voltage regulator decoupling ca- pacitor. c decouple x5r capacitor recommen- ded. apply between de- couple pin and ground 1 f ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 15 4.8 flash table 4.8. flash parameter symbol test condition min typ max unit flash erase cycles before failure ec flash 20000 cycles flash data retention ret flash t amb <150 c 10000 h t amb <85 c 10 years t amb <70 c 20 years word (32-bit) programming time t w_prog 20 s page erase time t perase 20 20.4 20.8 ms device erase time t derase 40 40.8 41.6 ms erase current i erase 7 1 ma write current i write 7 1 ma supply voltage during flash erase and write v flash 1.98 3.8 v note: 1. measured at 25 oc. ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 16 4.9 general purpose input output table 4.9. gpio parameter symbol test condition min typ max unit input low voltage v ioil 0.30 v dd v input high voltage v ioih 0.70 v dd v output high voltage (production test condition = 3.0v, drive- mode = standard) v iooh sourcing 0.1 ma, v dd =1.98 v, gpio_px_ctrl drivemode = lowest 0.80 v dd v sourcing 0.1 ma, v dd =3.0 v, gpio_px_ctrl drivemode = lowest 0.90 v dd v sourcing 1 ma, v dd =1.98 v, gpio_px_ctrl drivemode = low 0.85 v dd v sourcing 1 ma, v dd =3.0 v, gpio_px_ctrl drivemode = low 0.90 v dd v sourcing 6 ma, v dd =1.98 v, gpio_px_ctrl drivemode = standard 0.75 v dd v sourcing 6 ma, v dd =3.0 v, gpio_px_ctrl drivemode = standard 0.85 v dd v sourcing 20 ma, v dd =1.98 v, gpio_px_ctrl drivemode = high 0.60 v dd v sourcing 20 ma, v dd =3.0 v, gpio_px_ctrl drivemode = high 0.80 v dd v ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 17 parameter symbol test condition min typ max unit output low voltage (production test condition = 3.0 v, drive- mode = standard) v iool sinking 0.1 ma, v dd =1.98 v, gpio_px_ctrl drivemode = lowest 0.20 v dd v sinking 0.1 ma, v dd =3.0 v, gpio_px_ctrl drivemode = lowest 0.10 v dd v sinking 1 ma, v dd =1.98 v, gpio_px_ctrl drivemode = low 0.10 v dd v sinking 1 ma, v dd =3.0 v, gpio_px_ctrl drivemode = low 0.05 v dd v sinking 6 ma, v dd =1.98 v, gpio_px_ctrl drivemode = standard 0.30 v dd v sinking 6 ma, v dd =3.0 v, gpio_px_ctrl drivemode = standard 0.20 v dd v sinking 20 ma, v dd =1.98 v, gpio_px_ctrl drivemode = high 0.35 v dd v sinking 20 ma, v dd =3.0 v, gpio_px_ctrl drivemode = high 0.25 v dd v input leakage current i ioleak high impedance io connected to ground or vdd 0.1 100 na i/o pin pull-up resistor r pu 40 kohm i/o pin pull-down resistor r pd 40 kohm internal esd series resistor r ioesd 200 ohm pulse width of pulses to be re- moved by the glitch suppression filter t ioglitch 10 ns output fall time t ioof gpio_px_ctrl drivemode = lowest and load capaci- tance c l =12.5-25 pf. 20+0.1 c l 250 ns gpio_px_ctrl drivemode = low and load capacitance c l =350-600 pf 20+0.1 c l 250 ns i/o pin hysteresis (v iothr+ - v iothr- ) v iohyst v dd = 1.98 - 3.8 v 0.10 v dd v ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 18 0.0 0.5 1.0 1.5 2.0 low-level output voltage [v] 0.00 0.05 0.10 0.15 0.20 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = lowest 0.0 0.5 1.0 1.5 2.0 low-level output voltage [v] 0 1 2 3 4 5 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = low 0.0 0.5 1.0 1.5 2.0 low-level output voltage [v] 0 5 10 15 20 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = standard 0.0 0.5 1.0 1.5 2.0 low-level output voltage [v] 0 5 10 15 20 25 30 35 40 45 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = high figure 4.1. typical low-level output current, 2 v supply voltage ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 19 0.0 0.5 1.0 1.5 2.0 high-level output voltage [v] C0.20 C0.15 C0.10 C0.05 0.00 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = lowest 0.0 0.5 1.0 1.5 2.0 high-level output voltage [v] C2.5 C2.0 C1.5 C1.0 C0.5 0.0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = low 0.0 0.5 1.0 1.5 2.0 high-level output voltage [v] C20 C15 C10 C5 0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = standard 0.0 0.5 1.0 1.5 2.0 high-level output voltage [v] C50 C40 C30 C20 C10 0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = high figure 4.2. typical high-level output current, 2 v supply voltage ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 low-level output voltage [v] 0.0 0.1 0.2 0.3 0.4 0.5 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = lowest 0.0 0.5 1.0 1.5 2.0 2.5 3.0 low-level output voltage [v] 0 2 4 6 8 10 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = low 0.0 0.5 1.0 1.5 2.0 2.5 3.0 low-level output voltage [v] 0 5 10 15 20 25 30 35 40 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = standard 0.0 0.5 1.0 1.5 2.0 2.5 3.0 low-level output voltage [v] 0 10 20 30 40 50 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = high figure 4.3. typical low-level output current, 3 v supply voltage ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 21 0.0 0.5 1.0 1.5 2.0 2.5 3.0 high-level output voltage [v] C0.5 C0.4 C0.3 C0.2 C0.1 0.0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = lowest 0.0 0.5 1.0 1.5 2.0 2.5 3.0 high-level output voltage [v] C6 C5 C4 C3 C2 C1 0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = low 0.0 0.5 1.0 1.5 2.0 2.5 3.0 high-level output voltage [v] C50 C40 C30 C20 C10 0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = standard 0.0 0.5 1.0 1.5 2.0 2.5 3.0 high-level output voltage [v] C50 C40 C30 C20 C10 0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = high figure 4.4. typical high-level output current, 3 v supply voltage ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 22 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 low-level output voltage [v] 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = lowest 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 low-level output voltage [v] 0 2 4 6 8 10 12 14 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = low 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 low-level output voltage [v] 0 10 20 30 40 50 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = standard 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 low-level output voltage [v] 0 10 20 30 40 50 low-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = high figure 4.5. typical low-level output current, 3.8 v supply voltage ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 23 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 high-level output voltage [v] C0.8 C0.7 C0.6 C0.5 C0.4 C0.3 C0.2 C0.1 0.0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = lowest 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 high-level output voltage [v] C9 C8 C7 C6 C5 C4 C3 C2 C1 0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = low 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 high-level output voltage [v] C50 C40 C30 C20 C10 0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = standard 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 high-level output voltage [v] C50 C40 C30 C20 C10 0 high-level output current [ma] -40c 25c 85c gpio_px_ctrl drivemode = high figure 4.6. typical high-level output current, 3.8 v supply voltage ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 24 4.10 oscillators 4.10.1 lxfo table 4.10. lfxo parameter symbol test condition min typ max unit supported nominal crystal fre- quency f lfxo 32.768 khz supported crystal equivalent series resistance (esr) esr lfxo 30 120 k supported crystal external load range c lfxol x 1 25 pf duty cycle dc lfxo 48 50 53.5 % current consumption for core and buffer after startup i lfxo esr=30 k, c l =10 pf, lfxo- boost in cmu_ctrl is 1 190 na start- up time t lfxo esr=30 k, c l =10 pf, 40% - 60% duty cycle has been reached, lfxoboost in cmu_ctrl is 1 400 ms note: 1. see minimum load capacitance (c lfxol ) requirement for safe crystal startup in energyaware designer in simplicity studio. for safe startup of a given crystal, the energyaware designer in simplicity studio contains a tool to help users configure both load ca- pacitance and software settings for using the lfxo. for details regarding the crystal configuration, the reader is referred to application note an0016: efm32 oscillator design consideration . ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 25 4.10.2 hfxo table 4.11. hfxo parameter symbol test condition min typ max unit supported nominal crystal frequency f hfxo 4 48 mhz supported crystal equivalent series resistance (esr) esr hfxo crystal frequency 48 mhz 50 crystal frequency 32 mhz 30 60 crystal frequency 4 mhz 400 1500 the transconductance of the hfxo input transistor at crys- tal startup g mhfxo hfxoboost in cmu_ctrl equals 0b11 20 ms supported crystal external load range c hfxol 5 25 pf duty cycle dc hfxo 46 50 54 % current consumption for hfxo after startup i hfxo 4 mhz: esr=400 ohm, c l =20 pf, hfxoboost in cmu_ctrl equals 0b11 85 a 32 mhz: esr=30 ohm, c l =10 pf, hfxoboost in cmu_ctrl equals 0b11 165 a startup time t hfxo 32 mhz: esr=30 ohm, c l =10 pf, hfxoboost in cmu_ctrl equals 0b11 400 s ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 26 4.10.3 lfrco table 4.12. lfrco parameter symbol test condition min typ max unit oscillation frequency , v dd = 3.0 v, t amb =25 c f lfrco 31.29 32.768 34.28 khz startup time not including soft- ware calibration t lfrco 150 s current consumption i lfrco 300 na frequency step for lsb change in tuning value tune- step lfrco 1.5 % 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 vdd [v] 30 32 34 36 38 40 42 frequency [khz] -40c 25c 85c C40 C15 5 25 45 65 85 temperature [c] 30 32 34 36 38 40 42 frequency [khz] 2.0 v 3.0 v 3.8 v figure 4.7. calibrated lfrco frequency vs temperature and supply voltage ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 27 4.10.4 hfrco table 4.13. hfrco parameter symbol test condition min typ max unit oscillation frequency, v dd = 3.0 v, t amb =25 c f hfrco 28 mhz frequency band 27.5 28.0 28.5 mhz 21 mhz frequency band 20.6 21.0 21.4 mhz 14 mhz frequency band 13.7 14.0 14.3 mhz 11 mhz frequency band 10.8 11.0 11.2 mhz 7 mhz frequency band 6.48 6.60 6.72 mhz 1 mhz frequency band 1.15 1.20 1.25 mhz settling time after start-up t hfrco_set- tling f hfrco = 14 mhz 0.6 cycles current consumption i hfrco f hfrco = 28 mhz 165 215 a f hfrco = 21 mhz 134 175 a f hfrco = 14 mhz 106 140 a f hfrco = 11 mhz 94 125 a f hfrco = 6.6 mhz 77 105 a f hfrco = 1.2 mhz 25 40 a duty cycle dc hfrco f hfrco = 14 mhz 48.5 50 51 % frequency step for lsb change in tuning value tune- step hfrc o 0.3 1 % note: 1. the tuning field in the cmu_hfrcoctrl register may be used to adjust the hfrco frequency. there is enough adjustment range to ensure that the frequency bands above 7 mhz will always have some overlap across supply voltage and temperature. by using a stable frequency reference such as the lfxo or hfxo, a firmware calibration routine can vary the tuning bits and the frequency band to maintain the hfrco frequency at any arbitrary value between 7 mhz and 28 mhz across operating condi- tions. ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 28 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 vdd [v] 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 1.45 frequency [mhz] -40c 25c 85c C40 C15 5 25 45 65 85 temperature [c] 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 1.45 frequency [mhz] 2.0 v 3.0 v 3.8 v figure 4.8. calibrated hfrco 1 mhz band frequency vs supply voltage and temperature 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 vdd [v] 6.30 6.35 6.40 6.45 6.50 6.55 6.60 6.65 6.70 frequency [mhz] -40c 25c 85c C40 C15 5 25 45 65 85 temperature [c] 6.30 6.35 6.40 6.45 6.50 6.55 6.60 6.65 6.70 frequency [mhz] 2.0 v 3.0 v 3.8 v figure 4.9. calibrated hfrco 7 mhz band frequency vs supply voltage and temperature ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 29 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 vdd [v] 10.6 10.7 10.8 10.9 11.0 11.1 11.2 frequency [mhz] -40c 25c 85c C40 C15 5 25 45 65 85 temperature [c] 10.6 10.7 10.8 10.9 11.0 11.1 11.2 frequency [mhz] 2.0 v 3.0 v 3.8 v figure 4.10. calibrated hfrco 11 mhz band frequency vs supply voltage and temperature 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 vdd [v] 13.4 13.5 13.6 13.7 13.8 13.9 14.0 14.1 14.2 frequency [mhz] -40c 25c 85c C40 C15 5 25 45 65 85 temperature [c] 13.4 13.5 13.6 13.7 13.8 13.9 14.0 14.1 14.2 frequency [mhz] 2.0 v 3.0 v 3.8 v figure 4.11. calibrated hfrco 14 mhz band frequency vs supply voltage and temperature ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 30 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 vdd [v] 20.2 20.4 20.6 20.8 21.0 21.2 frequency [mhz] -40c 25c 85c C40 C15 5 25 45 65 85 temperature [c] 20.2 20.4 20.6 20.8 21.0 21.2 frequency [mhz] 2.0 v 3.0 v 3.8 v figure 4.12. calibrated hfrco 21 mhz band frequency vs supply voltage and temperature 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 vdd [v] 26.8 27.0 27.2 27.4 27.6 27.8 28.0 28.2 frequency [mhz] -40c 25c 85c C40 C15 5 25 45 65 85 temperature [c] 26.8 27.0 27.2 27.4 27.6 27.8 28.0 28.2 28.4 frequency [mhz] 2.0 v 3.0 v 3.8 v figure 4.13. calibrated hfrco 28 mhz band frequency vs supply voltage and temperature ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 31 4.10.5 auxhfrco table 4.14. auxhfrco parameter symbol test condition min typ max unit oscillation frequency, v dd = 3.0 v, t amb =25 c f auxhfrco 28 mhz frequency band 27.5 28.0 28.5 mhz 21 mhz frequency band 20.6 21.0 21.4 mhz 14 mhz frequency band 13.7 14.0 14.3 mhz 11 mhz frequency band 10.8 11.0 11.2 mhz 7 mhz frequency band 6.48 1 6.60 1 6.72 1 mhz 1 mhz frequency band 1.15 2 1.20 2 1.25 2 mhz settling time after start-up t auxhfr- co_settling f auxhfrco = 14 mhz 0.6 cycles frequency step for lsb change in tuning value tune- step auxhfr co 0.3 3 % note: 1. for devices with prod. rev. < 19, typ = 7 mhz and min/max values not applicable. 2. for devices with prod. rev. < 19, typ = 1 mhz and min/max values not applicable. 3. the tuning field in the cmu_auxhfrcoctrl register may be used to adjust the auxhfrco frequency. there is enough adjustment range to ensure that the frequency bands above 7 mhz will always have some overlap across supply voltage and temperature. by using a stable frequency reference such as the lfxo or hfxo, a firmware calibration routine can vary the tun- ing bits and the frequency band to maintain the auxhfrco frequency at any arbitrary value between 7 mhz and 28 mhz across operating conditions. 4.10.6 ulfrco table 4.15. ulfrco parameter symbol test condition min typ max unit oscillation frequency f ulfrco 25 c, 3 v 0.7 1.75 khz temperature coefficient tc ulfrco 0.05 %/c supply voltage coefficient vc ulfrco -18.2 %/v ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 32 4.11 analog digital converter (adc) table 4.16. adc parameter symbol test condition min typ max unit input voltage range v adcin single ended 0 v ref v differential -v ref /2 v ref /2 v input range of external refer- ence voltage, single ended and differential v adcrefin 1.25 v dd v input range of external nega- tive reference voltage on channel 7 v adcre- fin_ch7 see v adcrefin 0 v dd - 1.1 v input range of external posi- tive reference voltage on channel 6 v adcre- fin_ch6 see v adcrefin 0.625 v dd v common mode input range v adccmin 0 v dd v input current i adcin 2 pf sampling capacitors <100 na analog input common mode rejection ratio cmrr adc 65 db average active current i adc 1 msamples/s, 12 bit, external refer- ence 351 a 10 ksamples/s 12 bit, internal 1.25 v reference, warmupmode in adcn_ctrl set to 0b00 67 a 10 ksamples/s 12 bit, internal 1.25 v reference, warmupmode in adcn_ctrl set to 0b01 63 a 10 ksamples/s 12 bit, internal 1.25 v reference, warmupmode in adcn_ctrl set to 0b10 64 a current consumption of inter- nal voltage reference i adcref internal voltage reference 65 a input capacitance c adcin 2 pf input on resistance r adcin 1 mohm input rc filter resistance r adcfilt 10 kohm input rc filter/decoupling ca- pacitance c adcfilt 250 ff adc clock frequency f adcclk 13 mhz conversion time t adcconv 6 bit 7 adcclk cycles 8 bit 11 adcclk cycles 12 bit 13 adcclk cycles acquisition time t adcacq programmable 1 256 adcclk cycles ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 33 parameter symbol test condition min typ max unit required acquisition time for vdd/3 reference t ad- cacqvdd3 2 s startup time of reference gen- erator and adc core in nor- mal mode t adcstart 5 s startup time of reference gen- erator and adc core in keep- adcwarm mode 1 s signal to noise ratio (snr) snr adc 1 msamples/s, 12 bit, single ended, internal 1.25 v reference 59 db 1 msamples/s, 12 bit, single ended, internal 2.5 v reference 63 db 1 msamples/s, 12 bit, single ended, v dd reference 65 db 1 msamples/s, 12 bit, differential, in- ternal 1.25 v reference 60 db 1 msamples/s, 12 bit, differential, in- ternal 2.5 v reference 65 db 1 msamples/s, 12 bit, differential, 5 v reference 54 db 1 msamples/s, 12 bit, differential, v dd reference 67 db 1 msamples/s, 12 bit, differential, 2xv dd reference 69 db 200 ksamples/s, 12 bit, single ended, internal 1.25v reference 62 db 200 ksamples/s, 12 bit, single ended, internal 2.5 v reference 63 db 200 ksamples/s, 12 bit, single ended, v dd reference 67 db 200 ksamples/s, 12 bit, differential, internal 1.25 v reference 63 db 200 ksamples/s, 12 bit, differential, internal 2.5 v reference 66 db 200 ksamples/s, 12 bit, differential, 5 v reference 66 db 200 ksamples/s, 12 bit, differential, v dd reference 63 66 db 200 ksamples/s, 12 bit, differential, 2xv dd reference 70 db ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 34 parameter symbol test condition min typ max unit signal-to-noise and distor- tion-ratio (sinad) sinad adc 1 msamples/s, 12 bit, single ended, internal 1.25 v reference 58 db 1 msamples/s, 12 bit, single ended, internal 2.5 v reference 62 db 1 msamples/s, 12 bit, single ended, v dd reference 64 db 1 msamples/s, 12 bit, differential, in- ternal 1.25 v reference 60 db 1 msamples/s, 12 bit, differential, in- ternal 2.5 v reference 64 db 1 msamples/s, 12 bit, differential, 5v reference 54 db 1 msamples/s, 12 bit, differential, v dd reference 66 db 1 msamples/s, 12 bit, differential, 2xv dd reference 68 db 200 ksamples/s, 12 bit, single ended, internal 1.25 v reference 61 db 200 ksamples/s, 12 bit, single ended, internal 2.5 v reference 65 db 200 ksamples/s, 12 bit, single ended, v dd reference 66 db 200 ksamples/s, 12 bit, differential, internal 1.25 v reference 63 db 200 ksamples/s, 12 bit, differential, internal 2.5 v reference 66 db 200 ksamples/s, 12 bit, differential, 5v reference 66 db 200 ksamples/s, 12 bit, differential, v dd reference 62 66 db 200 ksamples/s, 12 bit, differential, 2xv dd reference 69 db ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 35 parameter symbol test condition min typ max unit spurious-free dynamic range (sfdr) sfdr adc 1 msamples/s, 12 bit, single ended, internal 1.25 v reference 64 dbc 1 msamples/s, 12 bit, single ended, internal 2.5 v reference 76 dbc 1 msamples/s, 12 bit, single ended, v dd reference 73 dbc 1 msamples/s, 12 bit, differential, in- ternal 1.25 v reference 66 dbc 1 msamples/s, 12 bit, differential, in- ternal 2.5 v reference 77 dbc 1 msamples/s, 12 bit, differential, v dd reference 76 dbc 1 msamples/s, 12 bit, differential, 2xv dd reference 75 dbc 1 msamples/s, 12 bit, differential, 5v reference 69 dbc 200 ksamples/s, 12 bit, single ended, internal 1.25 v reference 75 dbc 200 ksamples/s, 12 bit, single ended, internal 2.5 v reference 75 dbc 200 ksamples/s, 12 bit, single ended, v dd reference 76 dbc 200 ksamples/s, 12 bit, differential, internal 1.25 v reference 79 dbc 200 ksamples/s, 12 bit, differential, internal 2.5 v reference 79 dbc 200 ksamples/s, 12 bit, differential, 5 v reference 78 dbc 200 ksamples/s, 12 bit, differential, v dd reference 68 79 dbc 200 ksamples/s, 12 bit, differential, 2xv dd reference 79 dbc offset voltage v adcoff- set after calibration, single ended -3.5 0.3 3 mv after calibration, differential 0.3 mv thermometer output gradient tgrad ad cth -1.92 mv/c -6.3 adc co- des/c differential non-linearity (dnl) dnl adc -1 0.7 4 lsb integral non-linearity (inl), end point method inl adc 1.2 3 lsb no missing codes mc adc 11.999 1 12 bits gain error drift gain ed 1.25 v reference 0.01 2 0.033 3 %/c 2.5 v reference 0.01 2 0.03 3 %/c ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 36 parameter symbol test condition min typ max unit offset error drift offset ed 1.25 v reference 0.2 2 0.7 3 lsb/c 2.5 v reference 0.2 2 0.62 3 lsb/c note: 1. on the average every adc will have one missing code, most likely to appear around 2048 +/- n*512 where n can be a value in the set {-3, -2, -1, 1, 2, 3}. there will be no missing code around 2048, and in spite of the missing code the adc will be monotonic at all times so that a response to a slowly increasing input will always be a slowly increasing output. around the one code that is missing, the neighbour codes will look wider in the dnl plot. the spectra will show spurs on the level of -78 dbc for a full scale input for chips that have the missing code issue. 2. typical numbers given by abs(mean) / (85 - 25). 3. max number given by (abs(mean) + 3x stddev) / (85 - 25). the integral non-linearity (inl) and differential non-linearity parameters are explained in figure 3.14 (p. 33) and figure 3.15 (p. 33) , respectively. ideal transfer curve digital ouput code analog input inl=|[(v d -v ss )/v lsbideal ] - d| where 0 < d < 2 n - 1 0 1 2 3 4092 4093 4094 4095 v offset actual adc tranfer function before offset and gain correction actual adc tranfer function after offset and gain correction inl error (end point inl) figure 4.14. integral non-linearity (inl) ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 37 ideal transfer curve digital ouput code analog input dnl=|[(v d+1 - v d )/v lsbideal ] - 1| where 0 < d < 2 n - 2 0 1 2 3 4092 4093 4094 4095 actual transfer function with one missing code. 4 5 full scale range 0.5 lsb ideal code center ideal 50% transition point ideal spacing between two adjacent codes v lsbideal =1 lsb code width =2 lsb dnl=1 lsb example: adjacent input value v d+1 corrresponds to digital output code d+1 example: input value v d corrresponds to digital output code d figure 4.15. differential non-linearity (dnl) ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 38 4.11.1 typical performance 1.25v reference 2.5v reference 2xvddvss reference 5vdiff reference ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 39 v dd reference figure 4.16. adc frequency spectrum, v dd = 3 v, temp = 25 c 1.25v reference 2.5v reference ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 40 2xvddvss reference 5vdiff reference vdd reference figure 4.17. adc integral linearity error vs code, v dd = 3 v, temp = 25 c ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 41 1.25v reference 2.5v reference 2xvddvss reference 5vdiff reference ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 42 v dd reference figure 4.18. adc differential linearity error vs code, v dd = 3 v, temp = 25 c 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 vdd (v) C4 C3 C2 C1 0 1 2 3 4 5 actual offset [lsb] vref=1v25 vref=2v5 vref=2xvddvss vref=5vdiff vref=vdd offset vs supply voltage, temp = 25 c C40 C15 5 25 45 65 85 temp (c) C1.0 C0.5 0.0 0.5 1.0 1.5 2.0 actual offset [lsb] vref=1v25 vref=2v5 vref=2xvddvss vref=5vdiff vref=vdd offset vs temperature, v dd = 3 v figure 4.19. adc absolute offset, common mode = v dd /2 ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 43 C40 C15 5 25 45 65 85 temperature [c] 63 64 65 66 67 68 69 70 71 snr [db] 1v25 2v5 vdd 5vdiff 2xvddvss signal to noise ratio (snr) C40 C15 5 25 45 65 85 temperature [c] 78.0 78.2 78.4 78.6 78.8 79.0 79.2 79.4 sfdr [db] 1v25 2v5 vdd 5vdiff 2xvddvss spurious-free dynamic range (sfdr) figure 4.20. adc dynamic performance vs temperature for all adc references, v dd = 3 v C40 C25 C15 C5 5 15 25 35 45 55 65 75 85 temperature [c] 2100 2200 2300 2400 2500 2600 sensor readout vdd=2.0 vdd=3.0 vdd=3.8 figure 4.21. adc temperature sensor readout ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 44 4.12 digital analog converter (dac) table 4.17. dac parameter symbol test condition min typ max unit output voltage range v dacout vdd voltage reference, single ended 0 v dd v vdd voltage reference, differential -v dd v dd v output common mode voltage range v daccm 0 v dd v active current including refer- ences for 2 channels i dac 500 ksamples/s, 12 bit 400 1 a 100 ksamples/s, 12 bit 200 a 1 ksamples/s 12 bit normal 17 a sample rate sr dac 500 ksamples/s dac clock frequency f dac continuous mode 1000 khz sample/hold mode 250 khz sample/off mode 250 khz clock cyckles per conversion cyc dac- conv 2 conversion time t dacconv 2 s settling time t dacsettle 5 s signal to noise ratio (snr) snr dac 500 ksamples/s, 12 bit, single ended, internal 1.25 v reference 58 db 500 ksamples/s, 12 bit, single ended, internal 2.5 v reference 59 db 500 ksamples/s, 12 bit, differential, internal 1.25 v reference 58 db 500 ksamples/s, 12 bit, differential, internal 2.5 v reference 58 db 500 ksamples/s, 12 bit, differential, v dd reference 59 db signal to noise-pulse distor- tion ratio (sndr) sndr dac 500 ksamples/s, 12 bit, single ended, internal 1.25 v reference 57 db 500 ksamples/s, 12 bit, single ended, internal 2.5 v reference 54 db 500 ksamples/s, 12 bit, differential, internal 1.25 v reference 56 db 500 ksamples/s, 12 bit, differential, internal 2.5 v reference 53 db 500 ksamples/s, 12 bit, differential, v dd reference 55 db ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 45 parameter symbol test condition min typ max unit spurious-free dynamic range(sfdr) sfdr dac 500 ksamples/s, 12 bit, single ended, internal 1.25 v reference 62 dbc 500 ksamples/s, 12 bit, single ended, internal 2.5 v reference 56 dbc 500 ksamples/s, 12 bit, differential, internal 1.25 v reference 61 dbc 500 ksamples/s, 12 bit, differential, internal 2.5 v reference 55 dbc 500 ksamples/s, 12 bit, differential, v dd reference 60 dbc offset voltage v dacoff- set after calibration, single ended 2 9 mv after calibration, differential 2 mv differential non-linearity dnl dac 1 lsb integral non-linearity inl dac 5 lsb no missing codes mc dac 12 bits note: 1. measured with a static input code and no loading on the output. ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 46 4.13 operational amplifier (opamp) the electrical characteristics for the operational amplifiers are based on simulations. table 4.18. opamp parameter symbol test condition min typ max unit active current i opamp (opa2)biasprog=0xf, (opa2)halfbias=0x0, unity gain 370 460 a (opa2)biasprog=0x7, (opa2)halfbias=0x1, unity gain 95 135 a (opa2)biasprog=0x0, (opa2)halfbias=0x1, unity gain 13 25 a open loop gain g ol (opa2)biasprog=0xf, (opa2)halfbias=0x0 101 db (opa2)biasprog=0x7, (opa2)halfbias=0x1 98 db (opa2)biasprog=0x0, (opa2)halfbias=0x1 91 db gain bandwidth product gbw opa mp (opa2)biasprog=0xf, (opa2)halfbias=0x0 6.1 mhz (opa2)biasprog=0x7, (opa2)halfbias=0x1 1.8 mhz (opa2)biasprog=0x0, (opa2)halfbias=0x1 0.25 mhz phase margin pm opam p (opa2)biasprog=0xf, (opa2)halfbias=0x0, c l =75 pf 64 (opa2)biasprog=0x7, (opa2)halfbias=0x1, c l =75 pf 58 (opa2)biasprog=0x0, (opa2)halfbias=0x1, c l =75 pf 58 input resistance r input 100 m load resistance r load 200 dc load current i load_dc 11 ma input voltage v input opaxhcmdis=0 v ss v dd v opaxhcmdis=1 v ss v dd -1.2 v output voltage v output v ss v dd v input offset voltage v offset unity gain, v ss figure 4.25. opamp voltage noise spectral density (unity gain) v out = 1 v figure 4.26. opamp voltage noise spectral density (non-unity gain) ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 50 4.14 analog comparator (acmp) table 4.19. acmp parameter symbol test condition min typ max unit input voltage range v acmpin 0 v dd v acmp common mode voltage range v acmpcm 0 v dd v active current i acmp biasprog=0b0000, full- bias=0 and halfbias=1 in acmpn_ctrl register 0.1 0.4 a i acmpref biasprog=0b1111, full- bias=0 and halfbias=0 in acmpn_ctrl register 2.87 15 a v acmpoffset biasprog=0b1111, full- bias=1 and halfbias=0 in acmpn_ctrl register 195 520 a current consumption of internal voltage refer- ence v acmphyst internal voltage reference off. us- ing external voltage reference 0 a r csres internal voltage reference 5 a offset voltage t acmpstart biasprog= 0b1010, full- bias=0 and halfbias=0 in acmpn_ctrl register -12 0 12 mv acmp hysteresis programmable 17 mv capacitive sense inter- nal resistance csressel=0b00 in acmpn_in- putsel 39 k csressel=0b01 in acmpn_in- putsel 71 k csressel=0b10 in acmpn_in- putsel 104 k csressel=0b11 in acmpn_in- putsel 136 k startup time 10 s the total acmp current is the sum of the contributions from the acmp and its internal voltage reference as given below. i acmpref is zero if an external voltage reference is used: i acmptotal = i acmp = i acmpref ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 51 0 4 8 12 acmp_ctrl_biasprog 0.0 0.5 1.0 1.5 2.0 2.5 current [ua] current consumption, hystel = 4 0 2 4 6 8 10 12 14 acmp_ctrl_biasprog 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 response time [us] hystsel=0.0 hystsel=2.0 hystsel=4.0 hystsel=6.0 response time 0 1 2 3 4 5 6 7 acmp_ctrl_hystsel 0 20 40 60 80 100 hysteresis [mv] biasprog=0.0 biasprog=4.0 biasprog=8.0 biasprog=12.0 hysteresis figure 4.27. acmp characteristics, vdd = 3 v, temp = 25 c, fullbias = 0, halfbias = 1 ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 52 4.15 voltage comparator (vcmp) table 4.20. vcmp parameter symbol test condition min typ max unit input voltage range v vcmpin v dd v vcmp common mode voltage range v vcmpc m v dd v active current i vcmp biasprog=0b0000 and half- bias=1 in vcmpn_ctrl register 0.3 0.6 a biasprog=0b1111 and half- bias=0 in vcmpn_ctrl register. lpref=0. 22 35 a startup time reference generator t vcmpre f normal 10 s offset voltage v vcmpof fset single ended 10 mv differential 10 mv vcmp hysteresis v vcmphy st 61 210 mv startup time t vcmpst art 10 s the v dd trigger level can be configured by setting the triglevel field of the vcmp_ctrl register in accordance with the following equation: v dd trigger level =1.667 v+0.034 triglevel ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 53 4.16 i2c table 4.21. i2c standard-mode (sm) parameter symbol min typ max unit scl clock frequency f scl 0 100 1 khz scl clock low time t low 4.7 s scl clock high time t high 4.0 s sda set-up time t su,dat 250 ns sda hold time t hd,dat 8 3450 2, 3 ns repeated start condition set-up time t su,sta 4.7 s (repeated) start condition hold time t hd,sta 4.0 s stop condition set-up time t su,sto 4.0 s bus free time between a stop and a start condition t buf 4.7 s note: 1. for the minimum hfperclk frequency required in standard-mode, see the i2c chapter in the ezr32wg reference manual . 2. the maximum sda hold time (t hd,dat ) needs to be met only when the device does not stretch the low time of scl (t low ). 3. when transmitting data, this number is guaranteed only when i2cn_clkdiv < ((3450 * 10 -9 [s] * f hfperclk [hz]) - 4). table 4.22. i2c fast-mode (fm) parameter symbol min typ max unit scl clock frequency f scl 0 400 1 khz scl clock low time t low 1.3 s scl clock high time t high 0.6 s sda set-up time t su,dat 100 ns sda hold time t hd,dat 8 900 2 , 3 ns repeated start condition set-up time t su,sta 0.6 s (repeated) start condition hold time t hd,sta 0.6 s stop condition set-up time t su,sto 0.6 s bus free time between a stop and a start condi- tion t buf 1.3 s note: 1. for the minimum hfperclk frequency required in fast-mode, see the i2c chapter in the ezr32wg reference manual . 2. the maximum sda hold time (t hd,dat ) needs to be met only when the device does not stretch the low time of scl (t low ). 3. when transmitting data, this number is guaranteed only when i2cn_clkdiv < ((900 * 10 -9 [s] * f hfperclk [hz]) - 4). ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 54 table 4.23. i2c fast-mode plus (fm+) parameter symbol min typ max unit scl clock frequency f scl 0 1000 1 khz scl clock low time t low 0.5 s scl clock high time t high 0.26 s sda set-up time t su,dat 50 ns sda hold time t hd,dat 8 ns repeated start condition set-up time t su,sta 0.26 s (repeated) start condition hold time t hd,sta 0.26 s stop condition set-up time t su,sto 0.26 s bus free time between a stop and a start condition t buf 0.5 s note: 1. for the minimum hfperclk frequency required in fast-mode plus, see the i2c chapter in the ezr32wg reference manual . 4.17 radio all minimum and maximum values are guaranteed across the recommended operating conditions of supply voltage and from C40 to +85 c unless otherwise stated. all typical values apply at v dd = 3.3 v and 25 c unless otherwise stated. the data was collected while running off the internal rc oscillator (hfrco). ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 55 4.17.1 ezradiopro (r6x) dc electrical characteristics measured on direct-tie rf evaluation board. table 4.24. ezradiopro dc characteristics parameter symbol test condition min typ max unit power saving modes i shutdown rc oscillator, main digital regula- tor, and low power digital regulator off 30 4000 na i standby register values maintained and rc oscillator/wut off 40 9000 na i sleeprc rc oscillator, main digital regula- tor, and low power digital regulator off 740 10000 na i sleepxo sleep current using an external 32 khz crystal 1.7 a i sensor-lbd low battery detector on, register values maintained, and all other blocks off 1 a i ready crystal oscillator and main digital regulator on, all other blocks off 1.8 ma preamble sense mode cur- rent i psm duty cycing during preamble search, 1.2 kbps, 4 byte preamble 6 ma fixed 1s wakeup interval, 50 kbps, 5 byte preamble 10 a tune mode current i tunerx rx tune, high performance mode 7.6 ma i tunetx tx tune, high performance mode 7.8 ma rx mode current i rxh high performance mode, 868 mhz, 40 kbps 13.7 22 ma i rxl low power mode, 868 mhz, 40 kbps 11.1 ma tx mode current (r63, r68) i tx+20 +20 dbm output power, class-e match, 915 mhz, 3.3 v 88 108 ma +20 dbm output power, square-wave match, 169 mhz, 3.3 v 69 80 ma +13 dbm output power, class-e match, 915 mhz, 3.3 v 44.5 60 ma tx mode current (r60, r67) i tx+10 +10 dbm output power, class-e match, 868/915 mhz, 3.3 v 19.7 ma i tx_+10 +10 dbm output power, class-e match, 169 mhz, 3.3 v 18 ma i tx_+13 +13 dbm output power, class-e match, 868/915 mhz, 3.3 v 22 ma tx mode current (r61) i tx_+16 +16 dbm output power, class-e match, 868 mhz, 3.3 v 43 55 ma i tx_+13 +13 dbm output power, switched- current match, 868 mhz, 3.3 v 33.5 40 ma ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 56 4.17.2 ezradiopro (r6x) synthesizer ac electrical characteristics table 4.25. ezradiopro synthensizer parameter symbol test condition min typ max unit synthesizer frequency range f syn 850 1050 mhz 350 525 mhz 284 350 mhz 142 175 mhz synthesizer frequency resolution f res-1050 850C1050 mhz 28.6 hz f res-525 420C525 mhz 14.3 hz f res-350 283C350 mhz 9.5 hz f res-175 142C175 mhz 4.7 hz synthesizer settling time t lock measured from exiting ready mode with xosc running to any frequency. including vco cali- bration. 50 s phase noise l (fm) f = 10 khz, 169 mhz, high perf mode C117 C108 dbc/hz f = 100 khz, 169 mhz, high perf mode C120 C115 dbc/hz f = 1 mhz, 169 mhz, high perf mode C138 C135 dbc/hz f = 10 mhz, 169 mhz, high perf mode C148 C143 dbc/hz f = 10 khz, 915 mhz, high perf mode C102 C94 dbc/hz f = 100 khz, 915 mhz, high perf mode C105 C97 dbc/hz f = 1 mhz, 915 mhz, high perf mode C125 C122 dbc/hz f = 10 mhz, 915 mhz, high perf mode C138 C135 dbc/hz ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 57 4.17.3 ezradiopro (r6x) receiver ac electrical characteristics for per tests, 48 preamble symbols, 4 byte sync word, 10 byte payload and crc-32 was used. measured over 50000 bits using pn9 data sequence and data and clock on gpios. sensitivity is expected to be better if reading data from packet handler fifo especially at higher data rates. table 4.26. ezradiopro receiver ac electrical characteristics parameter symbol test condition min typ max unit rx frequency range f rx 850 1050 mhz 350 525 mhz 284 350 mhz 142 175 mhz rx sensitivity 169 mhz (r68, r67)3 p rx_0.1 (ber < 0.1%) (100 bps, gfsk, bt = 0.5, f = 100 hz) C133 dbm rx sensitivity 169 mhz (r60, r61, r63)3 p rx_0.5 (ber < 0.1%) (500 bps, gfsk, bt = 0.5, f = 250 hz) C129 dbm rx sensitivity 169 mhz (r60, r61, r63, r67, r68)3 p rx_40 (ber < 0.1%) (40 kbps, gfsk, bt = 0.5, f = 20 khz) C110.7 C108 dbm p rx_100 (ber < 0.1%) (100 kbps, gfsk, bt = 0.5, f = 50 khz) C106 C104 dbm p rx_125 (ber < 0.1%) (500 kbps, gfsk, bt = 0.5, f = 250 khz) C99 C96 dbm p rx_9.6 (per 1%) (9.6 kbps, 4gfsk, bt = 0.5, f = 2.4 khz) C110 dbm p rx_1m (per 1%) (1 mbps, 4gfsk, bt = 0.5, inner deviation = 83.3 khz) C89 dbm p rx_ook (ber < 0.1%, 4.8 kbps, 350 khz bw, ook, pn15 data) C110 C107 dbm (ber < 0.1%, 40 kbps, 350 khz bw, ook, pn15 data) C103 C100 dbm (ber < 0.1%, 120 kbps, 350 khz bw, ook, pn15 data) C97 C93 dbm rx sensitivity 915/868 mhz (r68, r67)3 p rx_0.1 (ber < 0.1%) (100 bps, gfsk, bt = 0.5, f = 100 hz) C132 dbm rx sensitivity 915/868 mhz (r60, r61, r63)3 p rx_0.5 (ber < 0.1%) (500 bps, gfsk, bt = 0.5, f = 250 hz) C127 dbm rx sensitivity 868 mhz (r60, r61, r63, r67, r68)3 p rx_40 (ber < 0.1%) (40 kbps, gfsk, bt = 0.5, f = 20 khz) C109.9 dbm rx sensitivity 915 mhz (r60, r61, r63, r67, r68)3 (ber < 0.1%) (40 kbps, gfsk, bt = 0.5, f = 20 khz) C109.4 dbm ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 58 parameter symbol test condition min typ max unit rx sensitivity 915/868 mhz (r60, r61, r63, r67, r68)3 p rx_100 (ber < 0.1%) (100 kbps, gfsk, bt = 0.5, f = 50 khz) C104 C102 dbm p rx_125 (ber < 0.1%) (500 kbps, gfsk, bt = 0.5, f = 250 khz) C97 C92 dbm p rx_9.6 (per 1%) (9.6 kbps, 4gfsk, bt = 0.5, f = 2.4 khz) C110.6 dbm p rx_1m (per 1%) (1 mbps, 4gfsk, bt = 0.5, inner deviation = 83.3 khz) C88.7 dbm p rx_ook (ber < 0.1%, 4.8 kbps, 350 khz bw, ook, pn15 data) C108 C104 dbm (ber < 0.1%, 40 kbps, 350 khz bw, ook, pn15 data) C101 C97 dbm (ber < 0.1%, 120 kbps, 350 khz bw, ook, pn15 data) C96 C91 dbm rx channel bandwidth (r60, r61, r63) bw 1.1 850 khz rx channel bandwidth (r68, r67) 0.2 850 khz rssi resolution res rssi valid from C110 dbm to -90 dbm 0.5 db 1-ch offset selectivity, 169 mhz c/i 1-ch desired ref signal 3 db above sen- sitivity, ber, <0.1%. interferer is cw and desired is modulated with 2.4 kbps f = 1.2 khz gfsk with bt = 0.5, rx channel bw = 4.8 khz, channel spacing = 12.5 khz C69 C59 db 1-ch offset selectivity, 450 mhz C60 C50 db 1-ch offset selectivity, 868 / 915 mhz C52.5 C45 db blocking 1 mhz offset 1m block desired ref signal 3 db above sen- sitivity, ber, <0.1%. interferer is cw and desired is modulated with 2.4 kbps f = 1.2 khz gfsk with bt = 0.5, rx channel bw = 4.8 khz C79 C68 db blocking 8 mhz offset 8m block C86 C75 db ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 59 parameter symbol test condition min typ max unit image rejection (if = 468.75 khz) im rej no image rejection calibration. re- jection at the image frequency. rf = 460 mhz 30 40 db with image rejection calibration. re- jection at the image frequency. rf = 460 mhz 40 55 db no image rejection calibration. re- jection at the image frequency. rf = 915 mhz 30 45 db with image rejection calibration. re- jection at the image frequency. rf = 915 mhz 40 52 db no image rejection calibration. re- jection at the image frequency. rf = 169 mhz 35 45 db with image rejection calibration. re- jection at the image frequency. rf = 169 mhz 45 60 db ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 60 4.17.4 ezradiopro (r6x) transmitter ac electrical characteristics the maximum data rate is dependent on the xtal frequency and is calculated as per the formula: maximum symbol rate = fxtal/60, where fxtal is the xtal frequency (typically 30 mhz). default api setting for modulation deviation resolution is double the typical value specified. output power is dependent on matching components and board layout. table 4.27. ezradiopro transmitter ac electrical characteristics parameter symbol test condition min typ max unit tx frequency range f tx 850 1050 mhz 350 525 mhz 284 350 mhz 142 175 mhz (g)fsk data rate dr fsk 0.1 500 kbps 4(g)fsk data rate dr 4fsk 0.2 1000 kbps ook data rate dr ook 0.1 120 kbps modulation deviation range f 960 850C1050 mhz 1.5 mhz f 525 420C525 mhz 750 khz f 420 350C420 mhz 600 khz f 350 283C350 mhz 500 khz f 175 142C175 mhz 250 khz modulation deviation resolu- tion f res-1050 850C1050 mhz 28.6 hz f res-525 420C525 mhz 14.3 hz f res-420 350C420 mhz 11.4 hz f res-350 283C350 mhz 9.5 hz f res-175 142C175 mhz 4.7 hz output power range (r63) p tx63 typical output power range at 3.3 v with class e mtch optimized for best pa efficiency C20 +20 dbm typical output power range (r61) p tx61 typical output power range at 3.3 v with class e mtch optimized for best pa efficiency C40 +16 dbm typical output power range at (r60) p tx60 typical output power range at 3.3 v with class e mtch optimized for best pa efficiency C20 +12.5 dbm typical output power range at (r68) p tx68 typical output power range at 3.3 v with class e mtch optimized for best pa efficiency C20 +20 dbm ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 61 parameter symbol test condition min typ max unit typical output power range at (r67) p tx67 typical output power range at 3.3 v with class e mtch optimized for best pa efficiency C20 +12.5 dbm output power variation (r63, r68) at 20 dbm pa power setting, 915 mhz, class e match, 3.3 v, 25 c 19 20 21 dbm output power variation (r60, r67) at 10 dbm pa power setting, 915 mhz, class e match, 3.3 v, 25 c 9 10 11 dbm output power variation (r63, r68) at 20 dbm pa power setting, 169 mhz, square wave match, 3.3 v, 25 c 18.5 20 21 dbm output power variation (r60, r67) at 10 dbm pa power setting, 169 mhz, square wave match, 3.3 v, 25 c 9.5 10 10.5 dbm tx rf output steps p rf_out using switched current match within 6 db of max power 0.25 0.4 db tx rf output level variation vs. temperature p rf_temp C40 to +85 c 2.3 3 db tx rf output level variation vs. frequency p- rf freq measured across 902C928 mhz 0.6 1.7 db transmit modulation filtering bt gaussian filtering bandwith time product 0.5 4.17.5 ezradiopro (r6x) radio auxillary block specifications microcontroller clock frequency tested in production at 1 mhz, 30 mhz, 32 mhz, and 32.768 khz. other frequencies tested by bench characterization. xtal range tested in production using an external clock source (similar to using a tcxo). table 4.28. ezradiopro auxiliary block specifications parameter symbol test condition min typ max unit xtal range xtal rang e 25 32 mhz 30 mhz xtal start-up time t 30m using xtal and board layout in ref- erence design. start-up time will vary with xtal type and board layout. 300 us 30 mhz xtal cap resolution 30m res 70 ff 32 khz xtal start-up time t 32k 2 sec 32 khz accuracy using inter- nal rc oscillator 32krc res 2500 ppm por reset time t por 6 ms ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 62 4.17.6 ezradio (r55) dc electrical characteristics table 4.29. ezradio dc characteristics parameter symbol test condition min typ max unit power saving modes i shutdown rc oscillator, main digital regula- tor, and low power digital regulator off 30 na i standby register values maintained 40 na i ready crystal oscillator and main digital regulator on, all other blocks off 1.8 ma i spiactive spi active state 1.5 ma tune mode current i tunerx rx tune 6.8 ma i tunetx tx tune 7.1 ma rx mode current i rx measured at 40 kbps, 20 khz devia- tion, 315 mhz 10.9 ma tx mode current i tx +10 dbm output power, measured on direct tie rf evaluation board at 868 mhz 19 ma +13 dbm output power, measured on direct tie rf evaluation board at 868 mhz 24 ma 4.17.7 ezradio (r55) synthesizer ac electrical characteristics table 4.30. ezradio synthensizer parameter symbol test condition min typ max unit synthesizer frequency range f syn 284 350 mhz 350 525 mhz 850 960 mhz synthesizer frequency reso- lution f res-960 850-960 mhz 114.4 hz f res-525 420-525 mhz 57.2 hz f res-420 420-525 mhz 57.2 hz f res-350 283-350 mhz 38.1 hz phase noise l (fm) f = 10 khz, 915 mhz 100 dbc/hz f = 100 khz, 915 mhz 102.1 dbc/hz f = 1 mhz, 915 mhz 123.5 dbc/hz f = 10 mhz, 915 mhz 136.6 dbc/hz ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 63 4.17.8 ezradio (r55) receiver ac electrical characteristics table 4.31. ezradio receiver ac electrical characteristics parameter symbol test condition min typ max unit rx frequency range f rx 284 350 mhz 350 525 mhz 850 960 mhz rx sensitivity 915 mhz p rx_2 (ber < 0.1%) (2.4 kbps, gfsk, bt = 0.5, f = 30 khz, 114 khz rx bw) -115 dbm p rx_40 (ber < 0.1%) (40 kbps, gfsk, bt = 0.5, f = 25 khz, 114 khz rx bw) -107.6 dbm p rx_128 (ber < 0.1%) (128 kbps, gfsk, bt = 0.5, f = 70 khz, 305 khz rx bw) -102.4 dbm p rx_ook (ber < 0.1%, 1 kbps, 185 khz rx bw, ook, pn15 data) -113.5 dbm (ber < 0.1%, 40 kbps, 185 khz bw, ook, pn15 data) -102.7 dbm rx channel bandwidth bw 40 850 khz rssi resolution res rssi valid from -110 dbm to -90 dbm 0.5 db 1-ch offset selectivity c/i 1-ch desired ref signal 3 db above sen- sitivity, ber, <0.1%. interferer is cw and desired is modulated with 1.2 kbps f = 5.2 khz gfsk with bt = 0.5, rx channel bw = 58 khz, chan- nel spacing = 100 khz -50 db 2-ch offset selectivity c/i 2-ch -56 db blocking 200 khz?1 mhz 200k block desired ref signal 3 db above sen- sitivity, ber, <0.1%. interferer is cw and desired is modulated with 1.2 kbps f = 5.2 khz gfsk with bt = 0.5, rx channel bw = 58 khz -56 db blocking 1 mhz offset 1m block -71 db blocking 8 mhz offset 8m block -71 db image rejection im rej rejection at the image frequency if = 468 khz 40 db ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 64 4.17.9 ezradio (r55) transmitter ac electrical characteristics the maximum data rate is dependent on the xtal frequency and is calculated as per the formula: maximum symbol rate = fxtal/60, where fxtal is the xtal frequency (typically 30 mhz). conducted measurements based on rf evaluation board. output power and emissions specifications are dependent on transmit fre- quency, matching components, and board layout. table 4.32. ezradio transmitter ac electrical characteristics parameter symbol test condition min typ max unit tx frequency range f tx 284 350 mhz 350 525 mhz 850 960 mhz (g)fsk data rate dr fsk 1.0 500 kbps ook data rate dr ook 0.5 120 kbps modulation deviation range f 960 850-960 mhz 500 khz f 525 350-525 mhz 500 khz f 350 284-350 mhz 500 khz modulation deviation resolu- tion f res-960 850-960 mhz 114.4 hz f res-525 420-525 mhz 57.2 hz f res-420 350-420 mhz 45.6 hz f res-350 284-350 mhz 38.1 hz output power range p tx measured at 434 mhz, 3.3 v, class e match -20 +13 dbm tx rf output steps p rf_out using switched current match within 6 db of max power 0.25 db tx rf output level variation vs. temperature p rf_temp -40 to +85 c 2.3 db tx rf output level variation vs. frequency p- rf freq measured across 902-928 mhz 0.6 db transmit modulation filtering bt gaussian filtering bandwith time product 0.5 ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 65 4.17.10 ezradio (r55) radio auxiliary block specifications xtal range tested in production using an external clock source (similar to using a tcxo). microcontroller clock frequency tested in production at 1 mhz, 30 mhz, 32 mhz, and 32.768 khz. other frequencies tested by bench characterization. table 4.33. ezradio auxilliary block specifications parameter symbol test condition min typ max unit xtal range xtal rang e 25 32 mhz 30 mhz xtal start-up time t 30m using xtal and board layout in ref- erence design. start-up time will vary with xtal type and board layout. 300 us 30 mhz xtal cap resolution 30m res 70 ff por reset time t por 6 ms ezr32wg230 data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.1 | 66 4.17.11 radio digital i/o specification 6.7 ns is typical for gpio0 rise time. assuming v dd = 3.3 v, drive strength is specified at v oh (min) = 2.64 v and vol(max) = 0.66 v at room temperature. 2.4 ns is typical for gpio0 fall time. table 4.34. ezradio/pro digital i/o specification parameter symbol test condition min typ max unit rise time t rise 0.1 x v dd to 0.9 x v dd , c l = 10 pf, drv<1:0> = ll 2.3 ns fall time t fall 0.9 x v dd to 0.1 x v dd , c l = 10 pf, drv<1:0> = ll 2 ns input capacitance c in 2 pf logic high level input volt- age v ih v dd_rf x 0.7 v logic low level input volt- age v il v dd_rf x 0.3 v input current i in 0 5. pinout and package note: please refer to the application note an0002: efm32 hardware design considerations for guidelines on designing printed circuit boards (pcb's) for the ezr32wg230. 5.1 pinout the ezr32wg230 pinout is shown in below. alternate locations are denoted by "#" followed by the location number (multiple locations on the same pin are split with "/"). alternate locations can be configured in the location bitfield in the *_route register in the mod- ule in question. figure 5.1. pinout (top view, not to scale) ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 69 5.2 pin descriptions table 5.1. device pinout qfn64 pin# and name pin alternate functionality / description pin # pin name analog timers communication other 0 vss ground. 1 nc no connect. 2 rxp differential rf input pin of the lna. see application schematic for example matching network. 3 rxn differential rf input pin of the lna. see application schematic for example matching network. 4 tx_13/16 transmit output pin (+13 dbm or +16 dbm) for r55, r60, r61, r67 and r69 variants. the pa output is an open-drain connection, so the l-c match must supply vdd (+3.3 vdc nominal) to this pin. pin is dnc on the +20 dbm parts. 5 tx_20 transmit output pin (+20 dbm) for r63, r68 and r69 variants. the pa output is an open-drain connec- tion, so the l-c match must supply vdd (+3.3 vdc nominal) to this pin. pin is dnc on the +13 dbm parts. 6 nc no connect. 7 rfvdd_2 +1.8 to +3.6 v supply voltage input to internal regulators for the radio. the recommended vdd supply voltage is +3.3 v. 8 txramp programmable bias output with ramp capability for external fet pa. 9 rfvdd_1 +1.8 to +3.6 v supply voltage input to internal regulators for the radio. the recommended vdd supply voltage is +3.3 v. 10 pa0 1 tim0_cc0 #0/1/4 leu0_rx #4 i2c0_sda #0 prs_ch0 #0 gpio_em4wu0 rf_gpio0 11 pa1 1 tim0_cc1 #0/1 i2c0_scl #0 cmu_clk1 #0 prs_ch1 #0 rf_gpio1 12 iovdd_0 digital io power supply 0. 13 pb3 pcnt1_s0in #1 us2_tx #1 14 pb4 pcnt1_s1in #1 us2_rx #1 15 pb5 us2_clk #1 16 pb6 us2_cs #1 17 pb7 lfxtal_p tim1_cc0 #3 usrf0_tx #4 18 pb8 lfxtal_n tim1_cc1 #3 usrf0_rx #4 19 pa12 tim2_cc0 #1 20 pa13 tim2_cc1 #1 21 pa14 tim2_cc2 #1 22 resetn reset input, active low.to apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up ensure that reset is released. 23 pb11 tim1_cc2 #3 le- tim0_out0 #1 24 avdd_1 analog power supply 1. 25 pb13 hfxtal_p leu0_tx #1 ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 70 qfn64 pin# and name pin alternate functionality / description pin # pin name analog timers communication other 26 pb14 hfxtal_n leu0_rx #1 27 iovdd_3 digital io power supply 3. 28 avdd_0 analog power supply 0. 29 pd0 adc0_ch0 opamp_out2 #1 pcnt2_s0in #0 us1_tx #1 30 pd1 adc0_ch1 dac0_out1alt #4/ opamp_out1alt tim0_cc0 #3 pcnt2_s1in #0 us1_rx #1 dbg_swo #2 31 pd2 adc0_ch2 tim0_cc1 #3 us1_clk #1 dbg_swo #3 32 pd3 adc0_ch3 opamp_n2 tim0_cc2 #3 us1_cs #1 etm_td1 #0/2 33 pd4 adc0_ch4 opamp_p2 leu0_tx #0 etm_td2 #0/2 34 pd5 adc0_ch5 opamp_out2 #0 leu0_rx #0 etm_td3 #0/2 35 pd6 adc0_ch6 dac0_p1 / opamp_p1 tim1_cc0 #4 le- tim0_out0 #0 pcnt0_s0in #3 us1_rx #2 i2c0_sda #1 acmp0_o #2 etm_td0 #0 boot_rx 36 pd7 adc0_ch7 dac0_n1 / opamp_n1 tim1_cc1 #4 le- tim0_out1 #0 pcnt0_s1in #3 us1_tx #2 i2c0_scl #1 cmu_clk0 #2 acmp1_o #2 etm_tclk #0 boot_tx 37 pd8 bu_vin cmu_clk1 #1 38 pc6 acmp0_ch6 leu1_tx #0 i2c0_sda #2 les_ch6 #0 etm_tclk #2 39 pc7 acmp0_ch7 leu1_rx #0 i2c0_scl #2 les_ch7 #0 etm_td0 #2 40 vdd_dreg power supply for on-chip voltage regulator. 41 dec_0 decouple output for on-chip voltage regulator. 42 pe0 tim3_cc0 #1 pcnt0_s0in #1 u0_tx #1 i2c1_sda #2 43 pe1 tim3_cc1 #1 pcnt0_s1in #1 u0_rx #1 i2c1_scl #2 44 pe2 bu_vout tim3_cc2 #1 u1_tx #3 acmp0_o #1 45 pe3 bu_stat u1_rx #3 acmp1_o #1 46 pc12 acmp1_ch4 dac0_out1alt #0/ opamp_out1alt u1_tx #0 cmu_clk0 #1 les_ch12 #0 47 pc13 acmp1_ch5 dac0_out1alt #1/ opamp_out1alt tim0_cdti0 #1/3 tim1_cc0 #0 tim1_cc2 #4 pcnt0_s0in #0 u1_rx #0 les_ch13 #0 48 pc14 acmp1_ch6 dac0_out1alt #2/ opamp_out1alt tim0_cdti1 #1/3 tim1_cc1 #0 pcnt0_s1in #0 u0_tx #3 les_ch14 #0 ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 71 qfn64 pin# and name pin alternate functionality / description pin # pin name analog timers communication other 49 pc15 acmp1_ch7 dac0_out1alt #3/ opamp_out1alt tim0_cdti2 #1/3 tim1_cc2 #0 u0_rx #3 les_ch15 #0 dbg_swo #1 50 pf0 tim0_cc0 #5 le- tim0_out0 #2 us1_clk #2 leu0_tx #3 i2c0_sda #5 dbg_swclk #0/1/2/3 51 pf1 tim0_cc1 #5 le- tim0_out1 #2 us1_cs #2 leu0_rx #3 i2c0_scl #5 dbg_swdio #0/1/2/3 gpio_em4wu3 52 pf2 tim0_cc2 #5 leu0_tx #4 acmp1_o #0 dbg_swo #0 gpio_em4wu4 53 pf3 tim0_cdti0 #2/5 prs_ch0 #1 54 pf4 tim0_cdti1 #2/5 prs_ch1 #1 55 pf12 56 pf5 tim0_cdti2 #2/5 prs_ch2 #1 57 iovdd_5 digital io power supply 5. 58 pf6 tim0_cc0 #2 59 pf7 tim0_cc1 #2 60 pf8 tim0_cc2 #2 61 xout ezradio peripheral crystal oscillator output. connect to an external 26/30 mhz crystal or leave floating if driving the xin pin with an external signal source. 62 xin ezradio peripheral crystal oscillator input. connect to an external 26/30 mhz crystal or to an external clock source. if using an external clock source with no crystal, dc coupling with a nominal 0.8 vdc level is recommended with a minimum ac amplitude of 700 mvpp. refer to an785 for more details about us- ing an external clock source. 63 gpio2 general purpose digital i/o for the radio. may be configured to perform various ezradio functions, in- cluding clock output, fifo status, por, wake-up timer, trsw, antdiversity control, etc. 64 gpio3 general purpose digital i/o for the radio. may be configured to perform various ezradio functions, in- cluding clock output, fifo status, por, wake-up timer, trsw, antdiversity control, etc. note: 1. general purpose digital i/o for the radio. may be configured to perform various ezradio functions, including clock output, fif- ostatus, por, wake-up timer, trsw, antdiversity control, etc. ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 72 5.3 alternate functionality pinout a wide selection of alternate functionality is available for multiplexing to various pins. this is shown in the table. the table shows the name of the alternate functionality in the first column, followed by columns showing the possible location bitfield settings. note: some functionality, such as analog interfaces, do no have alternate settings or a location bitfield. in these cases, the pinout is shown in the column corresponding to the location 0. table 5.2. alternate functionality overview alternate location functionality 0 1 2 3 4 5 description acmp0_ch6 pc6 analog comparator acmp0, channel 6. acmp0_ch7 pc7 analog comparator acmp0, channel 7. acmp0_o pe2 pd6 analog comparator acmp0, digital output. acmp1_ch4 pc12 analog comparator acmp1, channel 4. acmp1_ch5 pc13 analog comparator acmp1, channel 5. acmp1_ch6 pc14 analog comparator acmp1, channel 6. acmp1_ch7 pc15 analog comparator acmp1, channel 7. acmp1_o pf2 pe3 pd7 analog comparator acmp1, digital output. adc0_ch0 pd0 analog to digital converter adc0, input channel number 0. adc0_ch1 pd1 analog to digital converter adc0, input channel number 1. adc0_ch2 pd2 analog to digital converter adc0, input channel number 2. adc0_ch3 pd3 analog to digital converter adc0, input channel number 3. adc0_ch4 pd4 analog to digital converter adc0, input channel number 4. adc0_ch5 pd5 analog to digital converter adc0, input channel number 5. adc0_ch6 pd6 analog to digital converter adc0, input channel number 6. adc0_ch7 pd7 analog to digital converter adc0, input channel number 7. boot_rx pd6 bootloader rx. boot_tx pd7 bootloader tx. bu_stat pe3 backup power domain status, whether or not the sys- tem is in backup mode bu_vin pd8 battery input for backup power domain bu_vout pe2 power output for backup power domain cmu_clk0 pc12 pd7 clock management unit, clock output number 0. cmu_clk1 pa1 pd8 clock management unit, clock output number 1. dac0_n1 / opamp_n1 pd7 operational amplifier 1 external negative input. ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 73 alternate location functionality 0 1 2 3 4 5 description opamp_n2 pd3 operational amplifier 2 external negative input. dac0_out1alt / opamp_out1al t pc12 pc13 pc14 pc15 pd1 digital to analog converter dac0_out1alt /opamp alternative output for channel 1. opamp_out2 pd5 pd0 operational amplifier 2 output. dac0_p1 / opamp_p1 pd6 operational amplifier 1 external positive input. opamp_p2 pd4 operational amplifier 2 external positive input. dbg_swclk pf0 pf0 pf0 pf0 debug-interface serial wire clock input. note that this function is enabled to pin out of reset, and has a built-in pull down. dbg_swdio pf1 pf1 pf1 pf1 debug-interface serial wire data input / output. note that this function is enabled to pin out of reset, and has a built-in pull up. dbg_swo pf2 pc15 pd1 pd2 debug-interface serial wire viewer output. note that this function is not enabled after reset, and must be enabled by software to be used. etm_tclk pd7 pc6 embedded trace module etm clock . etm_td0 pd6 pc7 embedded trace module etm data 0. etm_td1 pd3 pd3 embedded trace module etm data 1. etm_td2 pd4 pd4 embedded trace module etm data 2. etm_td3 pd5 pd5 embedded trace module etm data 3. gpio_em4wu0 pa0 pin can be used to wake the system up from em4 gpio_em4wu3 pf1 pin can be used to wake the system up from em4 gpio_em4wu4 pf2 pin can be used to wake the system up from em4 hfxtal_n pb14 high frequency crystal negative pin. also used as ex- ternal optional clock input pin. hfxtal_p pb13 high frequency crystal positive pin. i2c0_scl pa1 pd7 pc7 pf1 i2c0 serial clock line input / output. i2c0_sda pa0 pd6 pc6 pf0 i2c0 serial data input / output. i2c1_scl pe1 i2c1 serial clock line input / output. i2c1_sda pe0 i2c1 serial data input / output. les_ch6 pc6 lesense channel 6. les_ch7 pc7 lesense channel 7. les_ch12 pc12 lesense channel 12. les_ch13 pc13 lesense channel 13. les_ch14 pc14 lesense channel 14. les_ch15 pc15 lesense channel 15. letim0_out0 pd6 pb11 pf0 low energy timer letim0, output channel 0. ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 74 alternate location functionality 0 1 2 3 4 5 description letim0_out1 pd7 pf1 low energy timer letim0, output channel 1. leu0_rx pd5 pb14 pf1 pa0 leuart0 receive input. leu0_tx pd4 pb13 pf0 pf2 leuart0 transmit output. also used as receive input in half duplex communication. leu1_rx pc7 leuart1 receive input. leu1_tx pc6 leuart1 transmit output. also used as receive input in half duplex communication. lfxtal_n pb8 low frequency crystal (typically 32.768 khz) negative pin. also used as an optional external clock input pin. lfxtal_p pb7 low frequency crystal (typically 32.768 khz) positive pin. pcnt0_s0in pc13 pe0 pd6 pulse counter pcnt0 input number 0. pcnt0_s1in pc14 pe1 pd7 pulse counter pcnt0 input number 1. pcnt1_s0in pb3 pulse counter pcnt1 input number 0. pcnt1_s1in pb4 pulse counter pcnt1 input number 1. pcnt2_s0in pd0 pulse counter pcnt2 input number 0. pcnt2_s1in pd1 pulse counter pcnt2 input number 1. prs_ch0 pa0 pf3 peripheral reflex system prs, channel 0. prs_ch1 pa1 pf4 peripheral reflex system prs, channel 1. prs_ch2 pf5 peripheral reflex system prs, channel 2. rf_gpio0 pa0 rf gpio0. rf_gpio1 pa1 rf gpio1. tim0_cc0 pa0 pa0 pf6 pd1 pa0 pf0 timer 0 capture compare input / output channel 0. tim0_cc1 pa1 pa1 pf7 pd2 pf1 timer 0 capture compare input / output channel 1. tim0_cc2 pf8 pd3 pf2 timer 0 capture compare input / output channel 2. tim0_cdti0 pc13 pf3 pc13 pf3 timer 0 complimentary deat time insertion channel 0. tim0_cdti1 pc14 pf4 pc14 pf4 timer 0 complimentary deat time insertion channel 1. tim0_cdti2 pc15 pf5 pc15 pf5 timer 0 complimentary deat time insertion channel 2. tim1_cc0 pc13 pb7 pd6 timer 1 capture compare input / output channel 0. tim1_cc1 pc14 pb8 pd7 timer 1 capture compare input / output channel 1. tim1_cc2 pc15 pb11 pc13 timer 1 capture compare input / output channel 2. tim2_cc0 pa12 timer 2 capture compare input / output channel 0. tim2_cc1 pa13 timer 2 capture compare input / output channel 1. tim2_cc2 pa14 timer 2 capture compare input / output channel 2. tim3_cc0 pe0 timer 3 capture compare input / output channel 0. tim3_cc1 pe1 timer 3 capture compare input / output channel 1. tim3_cc2 pe2 timer 3 capture compare input / output channel 2. u0_rx pe1 pc15 uart0 receive input. ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 75 alternate location functionality 0 1 2 3 4 5 description u0_tx pe0 pc14 uart0 transmit output. also used as receive input in half duplex communication. u1_rx pc13 pe3 uart1 receive input. u1_tx pc12 pe2 uart1 transmit output. also used as receive input in half duplex communication. us1_clk pd2 pf0 usart1 clock input / output. us1_cs pd3 pf1 usart1 chip select input / output. us1_rx pd1 pd6 usart1 asynchronous receive. usart1 synchronous mode master input / slave out- put (miso). us1_tx pd0 pd7 usart1 asynchronous transmit.also used as receive input in half duplex communication. usart1 synchronous mode master output / slave in- put (mosi). us2_clk pb5 usart2 clock input / output. us2_cs pb6 usart2 chip select input / output. us2_rx pb4 usart2 asynchronous receive. usart2 synchronous mode master input / slave out- put (miso). us2_tx pb3 usart2 asynchronous transmit.also used as receive input in half duplex communication. usart2 synchronous mode master output / slave in- put (mosi). usrf0_rx pb8 usartrf0 asynchronous receive. usartrf0 synchronous mode master input / slave output (miso). usrf0_tx pb7 usartrf0 asynchronous transmit.also used as re- ceive input in half duplex communication. usartrf0 synchronous mode master output / slave input (mosi). ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 76 5.4 gpio pinout overview the specific gpio pins available in ezr32 wg230 are shown in the gpio pinout table. each gpio port is organized as 16-bit ports indicated by letters a through f, and the individual pin on this port in indicated by a number from 15 down to 0. table 5.3. gpio pinout port pin 15 pin 14 pin 13 pin 12 pin 11 pin 10 pin 9 pin 8 pin 7 pin 6 pin 5 pin 4 pin 3 pin 2 pin 1 pin 0 port a pa14 pa13 pa12 port b pb14 pb13 pb11 pb8 pb7 pb6 pb5 pb4 pb3 port c pc15 pc14 pc13 pc12 pc7 pc6 port d pd8 pd7 pd6 pd5 pd4 pd3 pd2 pd1 pd0 port e pe3 pe2 pe1 pe0 port f pf12 pf8 pf7 pf6 pf5 pf4 pf3 pf2 pf1 pf0 5.5 opamp pinout overview the specific opamp terminals available in ezr32wg230 are shown in opamp pinout figure. - + opa0 - + opa2 - + opa1 out0alt out0 out2 out1alt out1 pc4 pc5 pd4 pd3 pd6 pd7 pb11 pb12 pc0 pc1 pc2 pc3 pc12 pc13 pc14 pc15 pd0 pd1 pd5 figure 5.2. opamp pinout ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 77 5.6 qfn64 package figure 5.3. qfn64 note: 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. dimensioning and tolerancing per ansi y14.5m-1994. 3. this drawing conforms to jedec outline mo-220 except for custom features d2, e2, l, z, and y which are toleranced per supplier designation. 4. recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components. table 5.4. qfn64 (dimensions in mm) symbol a a1 a3 b d/e d2/e2 e l r k aaa bbb ccc ddd eee fff min 0.80 0.00 0.20 ref 0.18 8.90 6.80 0.50 bsc 0.30 0.09 0.20 0.15 0.10 0.10 0.05 0.08 0.10 nom 0.85 0.02 0.25 9.00 6.90 0.40 max 0.90 0.05 0.30 9.10 7.00 0.50 0.14 the qfn64 package uses matte tin plated leadframe. all ezr32 packages are rohs compliant and free of bromine (br) and antimo- ny (sb). for additional quality and environmental information, please see: http://www.silabs.com/support/quality/pages/default.aspx ezr32wg230 data sheet pinout and package silabs.com | smart. connected. energy-friendly. rev. 1.1 | 78 6. pcb layout and soldering 6.1 recommended pcb layout figure 6.1. pcb land pattern table 6.1. pcb land pattern dimensions (dimensions in mm) symbol dimension (mm) s1 7.93 s 7.93 l1 7.00 w1 7.00 e 0.50 w 0.26 l 0.84 ezr32wg230 data sheet pcb layout and soldering silabs.com | smart. connected. energy-friendly. rev. 1.1 | 79 symbol dimension (mm) note: general 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. this land pattern design is based on the ipc-7351 guidelines. solder mask design 1. all metal pads are to be non-solder mask defined (nsmd). clearance between the solder mask and the metal pad is to be 60 m minimum, all the way around the pad. stencil design 1. a stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release. 2. the stencil thickness should be 0.125 mm (5 mils). 3. the ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads. 4. a 4x4 array of 1.45 mm square openings on a 1.25 mm pitch should be used for the center ground pad. card assembly 1. a no-clean, type-3 solder paste is recommended. 2. the recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components. 6.2 soldering information the latest ipc/jedec j-std-020 recommendations for pb-free reflow soldering should be followed. the packages have a moisture sensitivity level rating of 3, please see the latest ipc/jedec j-std-033 standard for msl description and level 3 bake conditions. place as many and as small as possible vias underneath each of the solder patches under the ground pad. ezr32wg230 data sheet pcb layout and soldering silabs.com | smart. connected. energy-friendly. rev. 1.1 | 80 7. top marking the top marking is illustrated and explained below. mark method: laser logo size: top center font size: 0.71 mm left-justified line 1 marking: ffffffffff = family part number (ezr32) refer to the line marking instruction from assembly po. line 2 marking: pppppppppp = part number ? p 1 p 2 : wg = wonder gecko ? p 3 p 4 p 5 : 230 (non usb) ? p 6 p 7 : flash size ? fe = 64 ? ff = 128 ? fg = 256 ? p 8 p 9 : radio ? 55 = ezradio +13 dbm, -116 sensitivity ? 60 = ezradiopro +13 dbm, -129 sensitivity ? 61 = ezradiopro +16 dbm, -129 sensitivity ? 63 = ezradiopro +20 dbm, -129 sensitivity ? 67 = ezradiopro +13 dbm, -133 sensitivity ? 68 = ezradiopro +20 dbm, -133 sensitivity ? 69 = ezradiopro +13 & 20 dbm, -133 sensitivity ? p 10 : temperature range ? g = -40 85 c line 3 marking: yy = year assigned by the assembly house. ww = work week corresponds to the year and work week of the mold date. tttttt = mfg code manufacturing code from the assembly purchase order from assembly po. line 4 marking: circle = 1.3 mm diameter; center justified "e3" pb-free symbol gecko logo; right justified gecko logo height = 1.90 mm ezr32wg230 data sheet top marking silabs.com | smart. connected. energy-friendly. rev. 1.1 | 81 8. revision history 8.1 revision history revision 1.1 ? updated opns in ordering section. ? usart0 in configuarion summary table changed to usartrf0. ? sleep current corrected from 40 na to 20 na. ? number of operational amplifiers corrected from 3 to 2. ? added "ezradio and ezradiopro transceivers gpio configuration" section. ? updated table 5.1 device pinout: revised pin 10, pin 11, pin 61, and pin 62 ? updated table 5.2 alternate functionality overview: removed gpio0 and gpio1 ? revised top marking table: corrected line 2 marking row ? updated section 5.6 (qfn64 package) and table 5.4 (qfn64 package dimensions)* ? updated section 6.1pcb land pattern dimensions* * this revision reflects the actual package dimension that is in production and affects the documentation only. there is no change to the package/product. revision 1.0 ? initial full production revision ezr32wg230 data sheet revision history silabs.com | smart. connected. energy-friendly. rev. 1.1 | 82 table of contents 1. feature list ................................ 1 2. ordering information ............................ 2 3. system overview .............................. 3 3.1 introduction ............................... 3 3.1.1 arm cortex-m4 core .......................... 3 3.1.2 debugging .............................. 3 3.1.3 memory system controller (msc) ...................... 3 3.1.4 direct memory access controller (dma) .................... 4 3.1.5 reset management unit (rmu) ....................... 4 3.1.6 energy management unit (emu) ....................... 4 3.1.7 clock management unit (cmu) ....................... 4 3.1.8 watchdog (wdog) ........................... 4 3.1.9 peripheral reflex system (prs) ....................... 4 3.1.10 inter-integrated circuit interface (i 2 c) ..................... 4 3.1.11 universal synchronous/asynchronous receiver/transmitter (usart) .......... 4 3.1.12 pre-programmed uart bootloader ..................... 4 3.1.13 universal asynchronous receiver/transmitter (uart) ............... 4 3.1.14 low energy universal asynchronous receiver/transmitter (leuart) .......... 5 3.1.15 timer/counter (timer) ......................... 5 3.1.16 real time counter (rtc) ......................... 5 3.1.17 backup real time counter (burtc) ..................... 5 3.1.18 low energy timer (letimer) ....................... 5 3.1.19 pulse counter (pcnt) .......................... 5 3.1.20 analog comparator (acmp) ........................ 5 3.1.21 voltage comparator (vcmp) ........................ 5 3.1.22 analog to digital converter (adc) ...................... 5 3.1.23 digital to analog converter (dac) ...................... 5 3.1.24 operational amplifier (opamp) ....................... 6 3.1.25 low energy sensor interface (lesense) ................... 6 3.1.26 backup power domain .......................... 6 3.1.27 advanced encryption standard accelerator (aes) ................ 6 3.1.28 general purpose input/output (gpio) .................... 6 3.1.29 ezradio ? and ezradiopro ? transceivers ................... 7 3.1.29.1 ezradio? and ezradiopro? transceivers gpio configuration ........... 8 3.2 configuration summary .......................... 9 3.3 memory map .............................. 10 4. electrical specifications .......................... 11 4.1 test conditions ............................. 11 4.1.1 typical values ............................. 11 4.1.2 minimum and maximum values ....................... 11 4.2 absolute maximum ratings ......................... 11 4.3 thermal characteristics .......................... 12 4.4 general operating conditions ........................ 12 table of contents 83 4.5 current consumption ........................... 13 4.6 transitions between energy modes ...................... 15 4.7 power management ............................ 15 4.8 flash ................................. 16 4.9 general purpose input output ........................ 17 4.10 oscillators ............................... 25 4.10.1 lxfo ............................... 25 4.10.2 hfxo ............................... 26 4.10.3 lfrco ............................... 27 4.10.4 hfrco ............................... 28 4.10.5 auxhfrco ............................. 32 4.10.6 ulfrco .............................. 32 4.11 analog digital converter (adc) ....................... 33 4.11.1 typical performance .......................... 39 4.12 digital analog converter (dac) ....................... 45 4.13 operational amplifier (opamp) ....................... 47 4.14 analog comparator (acmp) ........................ 51 4.15 voltage comparator (vcmp) ........................ 53 4.16 i2c ................................. 54 4.17 radio ................................ 55 4.17.1 ezradiopro (r6x) dc electrical characteristics ................. 56 4.17.2 ezradiopro (r6x) synthesizer ac electrical characteristics ............ 57 4.17.3 ezradiopro (r6x) receiver ac electrical characteristics ............. 58 4.17.4 ezradiopro (r6x) transmitter ac electrical characteristics ............. 61 4.17.5 ezradiopro (r6x) radio auxillary block specifications .............. 62 4.17.6 ezradio (r55) dc electrical characteristics .................. 63 4.17.7 ezradio (r55) synthesizer ac electrical characteristics .............. 63 4.17.8 ezradio (r55) receiver ac electrical characteristics ............... 64 4.17.9 ezradio (r55) transmitter ac electrical characteristics .............. 65 4.17.10 ezradio (r55) radio auxiliary block specifications ............... 66 4.17.11 radio digital i/o specification ....................... 67 4.18 digital peripherals ............................ 68 5. pinout and package ............................ 69 5.1 pinout ................................ 69 5.2 pin descriptions ............................. 70 5.3 alternate functionality pinout ........................ 73 5.4 gpio pinout overview ........................... 77 5.5 opamp pinout overview .......................... 77 5.6 qfn64 package ............................. 78 6. pcb layout and soldering ......................... 79 6.1 recommended pcb layout ......................... 79 6.2 soldering information ........................... 80 table of contents 84 7. top marking ............................... 81 8. revision history ............................. 82 8.1 revision history ............................. 82 table of contents .............................. 83 table of contents 85 86 disclaimer silicon laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the silicon laboratories products. characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "typical" parameters provided can and do vary in different applications. application examples described herein are for illustrative purposes only. silicon laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. silicon laboratories shall have no liability for the consequences of use of the information supplied herein. this document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. the products must not be used within any life support system without the specific written consent of silicon laboratories. a "life support system" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. silicon laboratories products are generally not intended for military applications. silicon laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons. trademark information silicon laboratories inc., silicon laboratories, silicon labs, silabs and the silicon labs logo, cmems?, efm, efm32, efr, energy micro, energy micro logo and combinations thereof, "the world?s most energy friendly microcontrollers", ember?, ezlink?, ezmac?, ezradio?, ezradiopro?, dspll?, isomodem ?, precision32?, proslic?, siphy?, usbxpress? and others are trademarks or registered trademarks of silicon laboratories inc. arm, cortex, cortex-m3 and thumb are trademarks or registered trademarks of arm holdings. keil is a registered trademark of arm limited. all other products or brand names mentioned herein are trademarks of their respective holders. http://www.silabs.com silicon laboratories inc. 400 west cesar chavez austin, tx 78701 usa simplicity studio one-click access to mcu tools, documentation, software, source code libraries & more. available for windows, mac and linux! www.silabs.com/simplicity mcu portfolio www.silabs.com/mcu sw/hw www.silabs.com/simplicity quality www.silabs.com/quality support and community community.silabs.com |
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